N74F826D datasheet(3/18 Pages) PHILIPS

Part #	N74F826D

Description	Bus interface registers

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Manufacturer	PHILIPS [NXP Semiconductors]

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Philips Semiconductors

Product specification

74F821/822/823/824/825/826

Bus interface registers

1996 Jan 05

3

INPUT AND OUTPUT LOADING AND FAN OUT TABLE

PINS

DESCRIPTION

74F (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

Dn

Data inputs

1.0/1.0

20

µA/0.6mA

74F821

CP

Clock input

1.0/1.0

20

µA/0.6mA

74F822

OE

Output enable input (active low)

1.0/3.0

20

µA/1.8mA

Qn, Qn

Data outputs

1200/106.7

24mA/64mA

Dn

Data inputs

1.0/1.0

20

µA/0.6mA

CP

Clock input

1.0/1.0

20

µA/0.6mA

74F823

CE

Clock enable input (active low)

1.0/3.0

20

µA/1.8mA

74F824

MR

Master reset input (active low)

1.0/3.0

20

µA/1.8mA

OE

Output enable input (active low)

1.0/3.0

20

µA/1.8mA

Qn, Qn

Data outputs

1200/106.7

24mA/64mA

Dn

Data inputs

1.0/1.0

20

µA/0.6mA

CP

Clock input

1.0/1.0

20

µA/0.6mA

74F825

CE

Clock enable input (active low)

1.0/3.0

20

µA/1.8mA

74F826

MR

Master reset input (active low)

1.0/3.0

20

µA/1.8mA

OE

Output enable input (active low)

1.0/3.0

20

µA/1.8mA

Qn, Qn

Data outputs

1200/106.7

24mA/64mA

NOTE: One (1.0) FAST unit load is defined as: 20

µA in the high state and 0.6mA in the low state.

PIN CONFIGURATION – 74F821

24

23

22

21

20

19

18

17

16

15

14

13

12

10

11

9

8

7

6

5

4

3

2

1

GND

OE

CP

Q0

Q3

Q4

Q5

Q6

VCC

Q7

Q1

Q2

Q8

Q9

D0

D3

D4

D5

D6

D7

D1

D2

D8

D9

SF00482

LOGIC SYMBOL – 74F821

CP

OE

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

13

1

D0 D1 D2 D3 D4 D5 D6 D7

23

45

67

8

9

23

22

21

20

19

18

17

16

VCC = Pin 24

GND = Pin 12

D8 D9

10

11

Q8 Q9

15

14

SF00483

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