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EM6617 Datasheet(PDF) 21 Page - EM Microelectronic - MARIN SA

Part No. EM6617
Description  Ultra Low Power Microcontroller with ADC AND EEPROM
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Maker  EMMICRO [EM Microelectronic - MARIN SA]
Homepage  http://www.emmicroelectronic.com
Logo EMMICRO - EM Microelectronic - MARIN SA

EM6617 Datasheet(HTML) 21 Page - EM Microelectronic - MARIN SA

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EM6617
Copyright
© 2005, EM Microelectronic-Marin SA
21
www.emmicroelectronic.com
For Metal mask selection and available resistor values refer to chapter 19.1.3.
Pull-down ON : MPCPD[n] must be in place ,
AND bit NoPdPC[n] must be ‘0’ .
Pull-down OFF: MPCPD[n] is not in place,
OR if MPCPD[n] is in place NoPdPC[n] = ‘1’ cuts off the pull-down.
OR selecting NchOpDPC[n] = ‘1’ cuts off the pull-down.
Pull-up ON
: MPCPU[n] must be in place,
AND bit NchOpDPC[n] must be ‘1’ ,
AND (bit PCIOCntl = ‘0’ (input mode) OR if PBIOCntl = ‘1’ while PCData[n] = 1. )
Pull-up OFF
: MPCPU[n] is not in place,
OR if MPCPU[n] is in place NchOpDPC[n] = ‘0’ cuts off the pull-up,
OR if MPCPU[n] is in place and if NchOpDPC[n] = ‘1’ then PCData[n] = 0 cuts the pull-up.
Never pull-up and pull-down can be active at the same time.
For
POWER SAVING one can switch off the port C pull resistors between two read phases. No cross current
flows in the input amplifier while the port C is not read. The recommended order is :
• Switch on the pull resistor.
• Allow sufficient time - RC constant - for the pull resistor to drive the line to either VSS or VDD.
• Read the port C
• Switch off the pull resistor
Minimum time with current on the pull resistor is 4 system clock periods, if the RC time constant is lower than 1
system clock period. Adding a NOP instruction before reading moves the number of periods with current in the
pull resistor to 6 and the maximum RC delay to 3 clock periods.
7.6.2 CMOS or Nch. Output
The port C outputs can be configured as either CMOS or Nch. open drain outputs. In CMOS both logic ‘1’ and ‘0’
are driven out on the terminal. In Nch. open drain only the logic ‘0’ is driven on the terminal, the logic ‘1’ value is
defined by the internal pull-up resistor (if implemented), or high impedance.
In CMOS output mode the pad can be driven high or low. Pull-ups and pull-downs are not active.
In CMOS input mode, if the corresponding metal option is in place (default), one can choose to have an internal
pull-down resistor by setting to “1“ the bit NoPdPC in OPTPCandStr register (default pull-down).
In N-Channel open drain mode, if the corresponding metal option is in place (default), one always has the pull-up
resistor active except if the port is in output mode and drives a "0" (RegPCCntl= "1", RegPBData[n]= "0") The pull-
down resistor is always off in Nch. open drain mode.
Pull-downs in CMOS input mode and weak pull-ups in Nch. open drain mode are port-wise configurable with the
register settings. The metal mask options to selectively connect or disconnect pull-up or pull-down resistors can
be different for each port C terminal.
Figure 16. CMOS or Nch. Open Drain Outputs
I / O
Te rm in a l
PC [n ]
MU X
A c tiv e P u ll-u p
fo r H ig h S ta te
P C D a ta [n ]
Tri-S ta te O u tp u t
B u ffe r : H ig h
Im p e dance fo r
D a ta = 1
I / O
T e rm inal
PC [n ]
P C D a ta [n ]
T ri-S tate O u tput
B u ffe r : c los ed
1
C M OS Ou tp u t
N c h. O pen D rain O u tput


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