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EM6617 Datasheet(PDF) 15 Page - EM Microelectronic - MARIN SA

Part No. EM6617
Description  Ultra Low Power Microcontroller with ADC AND EEPROM
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Maker  EMMICRO [EM Microelectronic - MARIN SA]
Homepage  http://www.emmicroelectronic.com
Logo EMMICRO - EM Microelectronic - MARIN SA

EM6617 Datasheet(HTML) 15 Page - EM Microelectronic - MARIN SA

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EM6617
Copyright
© 2005, EM Microelectronic-Marin SA
15
www.emmicroelectronic.com
7.2.2 Pull-up or Pull-down
Each of the input port terminals PA[3:0] has a resistor integrated which can be used either as pull-up or pull-down
resistor, depending on the selected metal mask options. See the port A metal mask chapter for details. The pull
resistor can be inhibited using the
NoPullPA[n] bits in the register OptNoPullPA.
Table 7.2.1. Pull-up or Pull-down Resistor on Port A Inputs
Option mask
pull-up
MPAPU[n]
Option mask
pull-down
MPAPD[n]
NoPullPA[n]
value
Action
no
no
x
no pull-up, no pull-down
no
yes
0
no pull-up, pull-down
no
yes
1
no pull-up, no pull-down
yes
no
0
pull-up, no pull-down
yes
no
1
no pull-up , no pull-down
yes
yes
x
not allowed*
* only pull-up or pull-down may be chosen on any port A terminal (one choice is excluding the other)
7.2.3 Software Test Variables
The port A terminals PA[2:0] are also used as input conditions for conditional software branches. Independent of
the
OPTDebIntPA and the OPTIntEdgPA. These CPU inputs always have a debouncer.
- Debounced PA[0] is connected to CPU TestVar1.
- Debounced PA[1] is connected to CPU TestVar2.
- SWB signal SWBEmpty is connected to CPU TestVar3
7.2.4 Port A for 10-Bit Counter
The PA[0] and PA[3] inputs can be used as the clock input terminal for the 10 bit counter in "event count" mode.
As for the IRQ generation one can choose debouncer or direct input with the register
OPTDebIntPA and non-
inverted or inverted input with the register
OPTIntEdgPA. Debouncer input is always recommended.
7.3 Port A registers
Table 7.3.1 Register RegPA
Bit
Name
Reset
R/W
Description
3
PAData[3]
-
R*
PA[3] input status
2
PAData[2]
-
R*
PA[2] input status
1
PAData[1]
-
R*
PA[1] input status
0
PAData[0]
-
R*
PA[0] input status
*Direct read on port A terminal
Table 7.3.2 Register RegIRQMask1
Bit
Name
Reset
R/W
Description
3
MaskIRQPA[3]
0
R/W
Interrupt mask for PA[3] input
2
MaskIRQPA[2]
0
R/W
Interrupt mask for PA[2] input
1
MaskIRQPA[1]
0
R/W
Interrupt mask for PA[1] input
0
MaskIRQPA[0]
0
R/W
Interrupt mask for PA[0] input
Default "0" is: interrupt request masked, no new request stored
with
n=0…3


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