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EM6617 Datasheet(PDF) 57 Page - EM Microelectronic - MARIN SA |
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EM6617 Datasheet(HTML) 57 Page - EM Microelectronic - MARIN SA |
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57 / 65 page 
EM6617 Copyright © 2005, EM Microelectronic-Marin SA 57 www.emmicroelectronic.com 21. Electrical Specification 21.1 Absolute Maximum Ratings Min. Max. Units Power supply VDD-VSS - 0.2 + 6.5 V Input voltage VSS - 0,2 VDD+0,2 V Storage temperature - 40 + 125 °C Electrostatic discharge to Mil-Std-883C method 3015.7 with ref. to VSS -2000 +2000 V Maximum soldering conditions 10s x 250 °C Stresses above these listed maximum ratings may cause permanent damage to the device. Exposure beyond specified electrical characteristics may affect device reliability or cause malfunction. 21.2 Handling Procedures This device has built-in protection against high static voltages or electric fields; however, anti-static precautions should be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the supply voltage range. 21.3 Standard Operating Conditions Parameter MIN TYP MAX Unit Description Temperature -40 25 85 °C VDD_Range 1 (note 1) 2.0 3.0 5.5 V With internal voltage regulator VSS 0 V Reference terminal, die substrate CVDDCA (note 2) 100 nF Regulated voltage capacitor Fq 32768 Hz Nominal frequency Rqs 35 KOhm Typical quartz serial resistance CL 8.2 pF Typical quartz load capacitance df/f +/- 30 ppm Quartz frequency tolerance Note 1: The minimum VDD of 2.0V allows proper system functionality for the core Logic and the EEPROM, However the ADC minimum voltage is > 2.6V for full range conversion and 0.2 LSB error. Note 2: This capacitor filters switching noise from VDD to keep it away from the internal logic cells. In noisy systems the capacitor should be chosen bigger than minimum value. |
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