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EM6617 Datasheet(PDF) 45 Page - EM Microelectronic - MARIN SA |
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EM6617 Datasheet(HTML) 45 Page - EM Microelectronic - MARIN SA |
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EM6617 Copyright © 2005, EM Microelectronic-Marin SA 45 www.emmicroelectronic.com Register Name Add Hex Add Dec Reset Value Read Bits Write Bits Remarks b'3210 Read/Write Bits RegIRQMask1 65 101 0000 0: MaskIRQPA[0] 1: MaskIRQPA[1] 2: MaskIRQPA[2] 3: MaskIRQPA[3] Port A interrupt mask Masking active low RegIRQMask2 66 102 0000 0: MaskIRQADC 1: MaskIRQEEP 2: MaskIRQHz32/8 3: MaskIRQHz1 Prescaler, EEPROM, ADC interrupt mask Masking active low RegIRQMask3 67 103 0000 0: MaskIRQCntComp 1: MaskIRQCount0 2: MaskIRQVLD 3 : '0' 0: MaskIRQCntComp 1: MaskIRQCount0 2: MaskIRQVLD 3: -- 10 bit counter, VLD interrupt mask Masking active low RegIRQ1 68 104 0000 0: IRQPA[0] 1: IRQPA[1] 2: IRQPA[2] 3: IRQPA[3] 0: RIRQPA[0] 1: RIRQPA[1] 2: RIRQPA[2] 3: RIRQPA[3] Read: Port A IRQ Write: Reset IRQ if data bit = 1. RegIRQ2 69 105 0000 0: IRQADC 1: IRQEEP 2: IRQHz32/8 3: IRQHz1 0: RIRQADC 1: RIRQEEP 2: RIRQHz32/8 3: RIRQHz1 Read: Prescaler, EEPROM, ADC IRQ ; Write: Reset IRQ if data bit = 1 RegIRQ3 6A 106 0000 0:IRQCntComp 1: IRQCount0 2: IRQVLD 3: '0' 0: RIRQCntComp 1: RIRQCount0 2: RIRQVLD 3: -- Read: 10 bit counter, VLD IRQ Write: Reset IRQ if data bit =1. RegSysCntl1 6B 107 00x0 0: ChTmDis 1: SelIntFull 2: '0' 3: IntEn 0: ChTmDis 1: SelIntFull 2: Sleep 3: IntEn System control 1 : ChTmDis only usable only for EM test modes with Test=1 RegSysCntl2 6C 108 0000 0: WDVal0 1: WDVal1 2: SleepEn 3: '0' 0: -- 1: -- 2: SleepEn 3: WDReset System control 2 : Watchdog value and periodical reset, Enable sleep mode RegSysCntl3 6D 109 0000 0: NoLogicWD 1: NoOscWD 2: '0' 3: Vref1/2Sel 0: NoLogicWD 1: NoOscWD 2: -- 3: Vref1/2Sel System control 3 : Watchdogs control, Reference Voltage for ADC IXLow 6E 110 xxxx 0: IXLow[0] 1: IXLow[1] 2: IXLow[2] 3: IXLow[3] Internal µP index Register low nibble IXHigh 6F 111 xxxx 0: IXHigh[4] 1: IXHigh[5] 2: IXHigh[6] 3: '0' 0: IXHigh[4] 1: IXHigh[5] 2: IXHigh[6] 3: -- Internal µP index Register high nibble RegIndexAdr 70 112 0000 0: IndexAdr[0] 1: IndexAdr[1] 2: IndexAdr[2] 3: IndexAdr[3] Index addressing register for4x16 nibble of Ram2 RegPresc 71 113 0000 0: DebSel 1: PrIntSel 2: '0' 3: PWMOn 0: DebSel 1: PrIntSel 2: ResPresc 3: PWMOn Prescaler control : Debouncer and prescaler interrupt selection RegVldCntl 72 114 0000 0: VLDlevel0 1: VLDlevel1 2: VLDBusy 3: VLDResult 0: VLDlevel0 1: VLDlevel1 2: VLDStart 3: -- VLD control : Level detection start (busy flag) and result |
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