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EM6604 Datasheet(PDF) 13 Page - EM Microelectronic - MARIN SA |
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EM6604 Datasheet(HTML) 13 Page - EM Microelectronic - MARIN SA |
13 / 25 page EM6604 03.02 REV. D/440 Copyright 2002, EM Microelectronic-Marin SA 13 www.emmicroelectronic.com Figure 10 Timer 8.1 Timer registers Table 8.2 Timer control register - TimCtr Bit Name Reset R/W Description 3 TimAuto 0 R/W Timer AUTO reload 2 TimEn 0 R/W Timer enable - active high 1 TEC1 0 R/W Timer Clock selection 1 0 TEC0 0 R/W Timer Clock selection 0 Table 8.3 LOW Timer Load/Status register - LTimLS (4 low bits) Bit Name Reset R/W Description 3 TL3/TS3 0 R/W Timer load/status bit 3 2 TL2/TS2 0 R/W Timer load/status bit 2 1 TL1/TS1 0 R/W Timer load/status bit 1 0 TL0/TS0 0 R/W Timer load/status bit 0 Table 8.4 HIGH Timer Load/Status register - HTimLS (4 high bits) Bit Name Reset R/W Description 3 TL7/TS7 0 R/W Timer load/status bit 7 2 TL6/TS6 0 R/W Timer load/status bit 6 1 TL5/TS5 0 R/W Timer load/status bit 5 0 TL4/TS4 0 R/W Timer load/status bit 4 9. Interrupt controller There are two internal and four external interrupt sources in EM6604 : 1) prescaler interrupt at 128Hz, 8Hz or 2Hz 2) timer interrupt when value changes from $FE to $FF 3) portA interrupt on falling edge (for PA3, PA2 and PA1) and rising edge (for PA0) A general interrupt mask is defined in the watchdog control register WD (INTEN bit). |
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