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SDA9410-B13 Datasheet(PDF) 60 Page - Micronas

Part No. SDA9410-B13
Description  Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Download  179 Pages
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Maker  MICRONAS [Micronas]
Homepage  http://www.micronas.com
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SDA9410-B13 Datasheet(HTML) 60 Page - Micronas

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SDA9410
Preliminary Data Sheet
Application modes and memory concept
60
Micronas
Table 47
Input write I²C Bus parameter
5.6.3
SRC mode configuration
Conditions:MEMOP=00, ORGMEMM=1, ORGMEMS=1
The described data configuration is typical for normal SRC mode with motion
compensated 100 Hz ABAB conversion and joint line free frame based PIP insertion.
5.6.4
SSC and MUP mode configuration
Conditions: MEMOP=01 or 10, ORGMEMM=1, ORGMEMS=1
I²C Bus
parameter
[Default]
Sub address
Description
CHRFORM
[0)
12h
Chrominance data format master channel
CHRFORS
[0]
34h
Chrominance data format slave channel
ORGMEMM
[1]
58h
Data configuration of the memory master channel
ORGMEMS
[1]
57h
Data configuration of the memory slave channel
MEMOP
[00]
53h
Memory operation mode
VERRESM
[0]
58h
Vertical resolution master channel
VERRESS
[0]
57h
Vertical resolution slave channel
MEMWRM
[0]
58h
Memory write mode master channel
MEMWRS
[0]
57h
Memory write mode slave channel
maximum picture size (master Channel) : 768 pixel X 288 lines
maximum picture size (slave channel) : 256 pixel X 104 lines


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