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SDA9410-B13 Datasheet(PDF) 58 Page - Micronas

Part No. SDA9410-B13
Description  Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Download  179 Pages
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Maker  MICRONAS [Micronas]
Homepage  http://www.micronas.com
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SDA9410-B13 Datasheet(HTML) 58 Page - Micronas

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SDA9410
Preliminary Data Sheet
Application modes and memory concept
58
Micronas
Table 43
Applications of different data configurations
Config.
Mode
Application
1
SRC
motion compensated up conversion (4:1:1 or 4:2:0) + PIP (ABAB, frame based)
2
SRC
motion compensated up conversion with enlarged picture size, no PIP facility
3
SRC
AABB conversion for master and slave channel, slave data is written twice (PIP-
and SSC-configuration)
used during switching from configuration 1 to configuration 7 without artefacts
4
SRC
2 independent not synchronized full size channels, AABB conversion
5
SSC
joint line free ’Double Window’ / ’Split Screen’ / ’PAP’ display, AABB conversion
6
SSC
display of 2 live channels, AABB conversion
slave channel exceeds the maximum double window size
7
SSC
display of 2 live channels, AABB conversion
master channel exceeds the maximum double window size
8
SSC
2 independent not synchronized full size channels, AABB conversion
9
MUP
high resolution Multi Picture for master and slave channel (one live picture possible)
AABB conversion
10
MUP
high resolution Multi Picture for master channel,
reduced resolution Multi Picture for slave channel, AABB conversion
11
MUP
reduced resolution Multi Picture for master channel,
high resolution Multi Picture for slave channel, AABB conversion
12
MUP
reduced resolution Multi Picture for master and slave channel, AABB conversion


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