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SDA9410-B13 Datasheet(PDF) 40 Page - Micronas

Part No. SDA9410-B13
Description  Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
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Maker  MICRONAS [Micronas]
Homepage  http://www.micronas.com
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SDA9410-B13 Datasheet(HTML) 40 Page - Micronas

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SDA9410
Preliminary Data Sheet
Input signal processing
40
Micronas
5.4.3
Noise reduction
The figure below shows a block diagram of the spatial and temporal motion adaptive
noise reduction (first order IIR filter). The spatial noise reduction is only performed on the
luminance signal. The structure of the temporal motion adaptive noise reduction is the
same for the luminance as for the chrominance signal.
Figure 15
Block diagram of noise reduction
5.4.3.1
Spatial noise reduction
Normally a spatial noise reduction reduces the resolution due to the low pass
characteristic of the used filter. Therefore the spatial noise reduction of the SDA 9410
works adaptive on the picture content. The low pas filter process is only executed on a
homogeneous area.
Table 21
Input write I²C Bus parameter
I²C Bus parameter
Sub address
Description
SNRON
1: on
0: off
1Ah
Spatial noise reduction of luminance signal
YIN
Spatial
noise
reduction
Field
delay
Frame
delay
DTNRON
0
1
YR
Motion
detector
Field
delay
UV1
Motion
detector
UVIN
TNRSEL
0
1
DY
DUV
SNRON
TNRCLY,
TNRHOY,
TNRKOY,
TNRVAY,
TNRFIY,
NRON
TNRCLC,
TNRHOC,
TNRKOC,
TNRVAC,
TNRFIC,
NRON
KY
KUV
YSNR
UVSNR
Frame
delay
1
0
DTNRON
YOUT
UVOUT


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