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SM8761ABS Datasheet(PDF) 7 Page - Nippon Precision Circuits Inc |
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SM8761ABS Datasheet(HTML) 7 Page - Nippon Precision Circuits Inc |
7 / 11 page SM8761 series NIPPON PRECISION CIRCUITS INC.—7 FUNCTIONAL DESCRIPTION Master Clock The SM8761 series master clock can be generated by the crystal oscillator formed by connecting a crystal between XT (pin 1) and XTN (pin 8) as shown in Figure 2. Alternatively, an external master clock can be input directly on XT (pin 1) as shown in Figure 3. If an external clock is input on XT, it is recommended that the clock have 50% duty and VDD level voltage amplitude. Note that the input clock amplitude voltage must not exceed the absolute maximum rating, otherwise it may cause the SM8761 series to breakdown. Figure 2. Crystal element connection Figure 3. External clock input Oscillator Internal Circuits XT (Pin1) XTN (Pin8) C1 C2 C1, C2 = 5 to 33pF Oscillator Internal Circuits XT (Pin1) XTN (Pin8) Open External Clock |
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