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IDT74ALVCH16721 Datasheet(PDF) 1 Page - Integrated Device Technology

Part No. IDT74ALVCH16721
Description  3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74ALVCH16721 Datasheet(HTML) 1 Page - Integrated Device Technology

   
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INDUSTRIALTEMPERATURERANGE
IDT74ALVCH16721
3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2004 Integrated Device Technology, Inc.
DSC-4747/2
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
•VCC = 2.5V ± 0.2V
• CMOS power levels (0.4
µµµµµ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Low switching noise
IDT74ALVCH16721
3.3V CMOS 20-BIT
FLIP-FLOP WITH 3-STATE
OUTPUTS AND BUS-HOLD
DESCRIPTION:
This20-bitflip-flopisbuiltusingadvanceddualmetalCMOStechnology.The
20 flip-flops of the ALVCH16721 are edge-triggered D-type flip-flops with
qualifiedclockstorage.Onthepositivetransitionoftheclock(CLK)input,the
deviceprovidestruedataattheQoutputsiftheclock-enable(CLKEN)input
is low. If CLKEN is high, no data is stored.
Abufferedoutput-enable(OE)inputplacesthe20outputsineitheranormal
logicstate(highorlow)orahigh-impedancestate.Inthehigh-impedancestate,
the outputs neither load nor drive the bus lines significantly. The high-
impedancestateandincreaseddriveprovidethecapabilitytodrivebuslines
withoutneedforinterfaceorpullupcomponents.OEdoesnotaffecttheinternal
operationoftheflip-flops.Olddatacanberetainedornewdatacanbeentered
whiletheoutputsareinthehigh-impedancestate.
The ALVCH16721 has been designed with a ±24mA output driver. This
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed
performance.
The ALVCH16721 has “bus-hold” which retains the inputs’ last state
whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs
andeliminatestheneedforpull-up/downresistor.
CLK
OE
CLKE N
D1
1
56
29
55
CE
C1
1D
2
Q1
TO 19 OTHER CHAN NELS


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