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N74F299D Datasheet(PDF) 7 Page - NXP Semiconductors |
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N74F299D Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 14 page  Philips Semiconductors Product specification 74F299 8-bit universal shift/storage register (3-State) 1990 Mar 01 7 AC ELECTRICAL CHARACTERISTICS LIMITS Tamb = +25°C Tamb = 0°C to +70°C SYMBOL PARAMETER TEST CONDITIONS VCC = +5.0V VCC = +5.0V ± 10% UNIT CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω MIN TYP MAX MIN MAX f Maximum clock frequency I/O Waveform 1 70 100 70 MHz fMAX Maximum clock frequency Qn Waveform 1 85 115 85 MHz tPLH tPHL Propagation delay CP to Q0 or Q7 Waveform 1 4.0 4.5 5.0 6.0 7.5 8.0 3.5 4.5 8.5 8.5 ns ns tPLH tPHL Propagation delay CP to I/On Waveform 1 4.0 4.0 6.0 6.5 9.0 9.0 4.0 4.0 10.0 10.0 ns ns tPHL Propagation delay MR to Q0 or Q7 Waveform 2 5.5 7.5 9.5 5.5 10.5 ns tPHL Propagation delay MR to I/On Waveform 2 5.5 7.5 10.0 5.5 10.5 ns tPZH tPZL Output Enable time Sn, OE to I/On Waveform 4 Waveform 5 3.5 4.0 6.0 7.5 8.0 10.0 3.5 4.0 9.0 11.0 ns ns tPHZ tPLZ Output Disable time Sn, OE to I/On Waveform 4 Waveform 5 2.5 1.5 4.5 2.5 7.0 5.5 2.5 1.5 8.0 6.5 ns ns AC SETUP REQUIREMENTS LIMITS Tamb = +25°C Tamb = 0°C to +70°C SYMBOL PARAMETER TEST CONDITIONS VCC = +5.0V VCC = +5.0V ± 10% UNIT CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω MIN TYP MAX MIN MAX ts(H) ts(L) Setup time, High or Low S0 or S1 to CP Waveform 3 6.5 6.5 7.5 7.5 ns ns th(H) th(L) Hold time, High or Low S0 or S1 to CP Waveform 3 0 0 0 0 ns ns ts(H) ts(L) Set-up time, High or Low I/On, DSL or DSR to CP Waveform 3 3.5 3.5 4.0 4.0 ns ns th(H) th(L) Hold time, High or Low I/On, DSL or DSR to CP Waveform 3 0 0 0 0 ns ns tw(H) tw(L) CP Pulse width, High or Low Waveform 1 5.0 4.5 5.0 4.5 ns tw(L) MR Pulse width, Low Waveform 2 4.5 4.5 ns trec Recovery time, MR to CP Waveform 2 4.0 4.0 ns |
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