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MSP430X43X Datasheet(PDF) 8 Page - Texas Instruments

Part No. MSP430X43X
Description  Mixed signal microcontroller
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430X43X Datasheet(HTML) 8 Page - Texas Instruments

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MSP430x43x, MSP430x44x
MIXED SIGNAL MICROCONTROLLER
SLAS344C – JANUARY 2002 – REVISED MARCH2003
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
MSP430x43x Terminal Functions (Continued)
TERMINAL
PN
I/O
PZ
I/O
DESCRIPTION
NAME
NO.
I/O
NAME
NO.
I/O
DESCRIPTION
P2.4/UTXD0
55
I/O
P2.4/UTXD0
75
I/O
General-purpose digital I/O / transmit data out—USART0/UART mode
P2.3/TB2
56
I/O
P2.3/TB2
76
I/O
General-purpose digital I/O / Timer_B3 CCR2.
Capture: CCI2A/CCI2B input, compare: Out2 output
P2.2/TB1
57
I/O
P2.2/TB1
77
I/O
General-purpose digital I/O / Timer_B3 CCR1.
Capture: CCI1A/CCI1B input, compare: Out1 output
P2.1/TB0
58
I/O
P2.1/TB0
78
I/O
General-purpose digital I/O / Timer_B3 CCR0.
Capture: CCI0A/CCI0B input, compare: Out0 output
P2.0/TA2
59
I/O
P2.0/TA2
79
I/O
General-purpose digital I/O / Timer_A
Capture: CCI2A input, compare: Out2 output
P1.7/CA1
60
I/O
P1.7/CA1
80
I/O
General-purpose digital I/O / Comparator_A input
P1.6/CA0
61
I/O
P1.6/CA0
81
I/O
General-purpose digital I/O / Comparator_A input
P1.5/TACLK/
ACLK
62
I/O
P1.5/TACLK/
ACLK
82
I/O
General-purpose digital I/O / Timer_A, clock signal TACLK input /
ACLK output (divided by 1, 2, 4, or 8)
P1.4/TBCLK/
SMCLK
63
I/O
P1.4/TBCLK/
SMCLK
83
I/O
General-purpose digital I/O / input clock TBCLK—Timer_B3 / submain
system clock SMCLK output
P1.3/TBOUTH/
SVSOUT
64
I/O
P1.3/TBOUTH/
SVSOUT
84
I/O
General-purpose digital I/O / switch all PWM digital output ports to high
impedance—Timer_B3 TB0 to TB2 / SVS: output of SVS comparator
P1.2/TA1
65
I/O
P1.2/TA1
85
I/O
General-purpose digital I/O / Timer_A, Capture: CCI1A, compare:
Out1 output
P1.1/TA0/MCLK
66
I/O
P1.1/TA0/MCLK
86
I/O
General-purpose digital I/O / Timer_A. Capture: CCI0B / MCLK output.
Note: TA0 is only an input on this pin.
P1.0/TA0
67
I/O
P1.0/TA0
87
I/O
General-purpose digital I/O / Timer_A. Capture: CCI0A input,
compare: Out0 output
XT2OUT
68
O
XT2OUT
88
O
Output terminal of crystal oscillator XT2
XT2IN
69
I
XT2IN
89
I
Input port for crystal oscillator XT2. Only standard crystals can be
connected.
TDO/TDI
70
I/O
TDO/TDI
90
I/O
Test data output port. TDO/TDI data output or programming data input
terminal
TDI
71
I
TDI
91
I
Test data input. TDI is used as a data input port. The device protection
fuse is connected to TDI.
TMS
72
I
TMS
92
I
Test mode select. TMS is used as an input port for device programming
and test.
TCK
73
I
TCK
93
I
Test clock. TCK is the clock input port for device programming and test.
RST/NMI
74
I
RST/NMI
94
I
General-purpose digital I/O / reset input or nonmaskable interrupt input
port
P6.0/A0
75
I/O
P6.0/A0
95
I/O
General-purpose digital I/O / analog input a0 – 12-bit ADC
P6.1/A1
76
I/O
P6.1/A1
96
I/O
General-purpose digital I/O / analog input a1 – 12-bit ADC
P6.2/A2
77
I/O
P6.2/A2
97
I/O
General-purpose digital I/O / analog input a2 – 12-bit ADC
AVSS
78
AVSS
98
Negative terminal that supplies SVS, brownout, oscillator, FLL+,
comparator_A, port 1, and LCD resistive divider circuitry.
DVSS1
79
DVSS1
99
Digital supply voltage, negative terminal. Supplies all digital parts,
except those which are supplied via AVCC/AVSS.
AVCC
80
AVCC
100
Positive terminal that supplies SVS, brownout, oscillator, FLL+,
comparator_A, port 1, and LCD resistive divider circuitry; must not
power up prior to DVCC1/DVCC2.


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