IS65LV256AL

IS62LV256AL

8

Rev. A

03/17/06

Notes:

1. The internal write time is defined by the overlap of

CE LOW and WE LOW. All signals must be in valid states to initiate a Write,

but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling

edge of the signal that terminates the Write.

2. I/O will assume the High-Z state if

OE

HIGH-Z

DATA UNDEFINED

DATA-IN VALID

ADDRESS

CE

WE

WRITE CYCLE NO. 2 (

CE

CE

CE

CE