Electronic Components Datasheet Search |
|
IS64WV102416BLL-10TA3 Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
|
IS64WV102416BLL-10TA3 Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 21 page Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1 Rev. A 02/13/06 ISSI® Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. IS61WV102416ALL IS61WV102416BLL IS64WV102416BLL 1M x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY APRIL 2006 FEATURES • High-speed access times: 8, 10, 20 ns • High-performance, low-power CMOS process • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE and OE op- tions • CE power-down • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single power supply VDD 1.65V to 2.2V (IS61WV102416ALL) speed = 20ns for VDD 1.65V to 2.2V VDD 2.4V to 3.6V (IS61/64WV102416BLL) speed = 10ns for VDD 2.4V to 3.6V speed = 8ns for VDD 3.3V + 5% • Packages available: – 48-ball miniBGA (9mm x 11mm) – 48-pin TSOP (Type I) • Industrial and Automotive Temperature Support • Lead-free available • Data control for upper and lower bytes FUNCTIONAL BLOCK DIAGRAM DESCRIPTION The ISSI IS61WV102416ALL/BLL and IS64WV102416BLL are high-speed, 16M-bit static RAMs organized as 1024K words by 16 bits. It is fabricated using ISSI's high-perform- ance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-perfor- mance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable ( WE) controls both writing and reading of the memory. A data byte allows Upper Byte ( UB) and Lower Byte ( LB) access. The device is packaged in the JEDEC standard 48-pin TSOP Type I and 48-pin Mini BGA (9mm x 11mm). A0-A19 CE OE WE 1024K x 16 MEMORY ARRAY DECODER COLUMN I/O CONTROL CIRCUIT GND VDD I/O DATA CIRCUIT I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte UB LB |
Similar Part No. - IS64WV102416BLL-10TA3 |
|
Similar Description - IS64WV102416BLL-10TA3 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |