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IS61LF12832A Datasheet(PDF) 5 Page - Integrated Silicon Solution, Inc

Part No. IS61LF12832A
Description  128K x 32, 128K x 36, 256K x 18 4 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS61LF12832A Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc. — 1-800-379-4774
5
Rev. 00A
08/11/05
ISSI®
IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A
IS64VF12832A, IS61(64)VF12836A, IS61(64)VF25618A
119 BGA PACKAGE PIN CONFIGURATION
256KX18 (TOP VIEW)
PIN DESCRIPTIONS
Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.
123456
7
A
VDDQ
AA
ADSP
AA
VDDQ
B
NC
CE2
A
ADSC
A
CE2
NC
C
NC
A
A
VDD
A
A
NC
D
DQb
NC
Vss
NC
Vss
DQPa
NC
E
NC
DQb
Vss
CE
Vss
NC
DQa
F
VDDQ
NC
Vss
OE
Vss
DQa
VDDQ
G
NC
DQb
BWb
ADV
Vss
NC
DQa
H
DQb
NC
Vss
GW
Vss
DQa
NC
J
VDDQ
VDD
NC
VDD
NC
VDD
VDDQ
K
NC
DQb
Vss
CLK
Vss
NC
DQa
L
DQb
NC
Vss
NC
BWa
DQa
NC
M
VDDQ
DQb
Vss
BWE
Vss
NC
VDDQ
N
DQb
NC
Vss
A1*
Vss
DQa
NC
P
NC
DQPb
Vss
A0*
Vss
NC
DQa
R
NC
A
MODE
VDD
NC
A
NC
T
NC
A
A
NC
A
A
ZZ
U
VDDQ
NC
NC
NC
NC
NC
VDDQ
Symbol
Pin Name
A
Address Inputs
A0, A1
Synchronous Burst Address Inputs
ADV
Synchronous Burst Address
Advance
ADSP
Address Status Processor
ADSC
Address Status Controller
GW
Global Write Enable
CLK
Synchronous Clock
CE, CE2, CE2
Synchronous Chip Select
BWx (x=a,b)
Synchronous Byte Write Controls
BWE
Byte Write Enable
Symbol
Pin Name
OE
Output Enable
ZZ
Power Sleep Mode
MODE
Burst Sequence Selection
NC
No Connect
DQa-DQb
Data Inputs/Outputs
DQPa-Pb
Output Power Supply
VDD
Power Supply
VDDQ
Output Power Supply
Vss
Ground


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