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IS42VS16400C1 Datasheet(PDF) 22 Page - Integrated Silicon Solution, Inc |
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IS42VS16400C1 Datasheet(HTML) 22 Page - Integrated Silicon Solution, Inc |
22 / 56 page IS42VS16400C1 ISSI® 22 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 10/06/05 DON'T CARE UNDEFINED CLK COMMAND DQ READ NOP NOP NOP CAS Latency - 3 tAC tOH DOUT T0 T1 T2 T3 T4 tLZ CLK COMMAND DQ READ NOP NOP CAS Latency - 2 tAC tOH DOUT T0 T1 T2 T3 tLZ CAS Latency possible CAS latency; data element n + 3 is either the last of a burst of four or the last desired of a longer burst. Following the PRECHARGE command, a subsequent command to the same bank cannot be issued until tRP is met. Note that part of the row precharge time is hidden during the access of the last data element(s). In the case of a fixed-length burst being executed to completion, a PRECHARGE command issued at the optimum time (as described above) provides the same operation that would result from the same fixed-length burst with auto precharge. The disadvantage of the PRECHARGE command is that it requires that the com- mand and address buses be available at the appropriate time to issue the command; the advantage of the PRECHARGE command is that it can be used to truncate fixed-length or full-page bursts. Full-page READ bursts can be truncated with the BURST TERMINATE command, and fixed-length READ bursts may be truncated with a BURST TERMINATE command, provided that auto precharge was not activated. The BURST TERMINATE command should be issued x cycles before the clock edge at which the last desired data element is valid, where x equals the CAS latency minus one. This is shown in the READ Burst Termination diagram for each possible CAS latency; data element n + 3 is the last desired data element of a longer burst. |
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