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IS41LV16257B-35KL Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS41LV16257B-35KL Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 20 page IS41LV16257B ISSI® Integrated Silicon Solution, Inc. — 1-800-379-4774 1 Rev. B 04/22/05 Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. FEATURES • Fast access and cycle time • TTL compatible inputs and outputs • Refresh Interval: 512 cycles/8 ms • Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden • JEDEC standard pinout • Single power supply: 3.3V ± 10% • Byte Write and Byte Read operation via two CAS • Lead-free available DESCRIPTION The ISSI IS41LV16257B is 262,144 x 16-bit high- performance CMOS Dynamic Random Access Memories. Fast Page Mode allows 512 random accesses within a single row with access cycle time as short as 12 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes these devices ideal for use in 16- and 32-bit wide data bus systems. These features make the IS41LV16257B ideally suited for high band-width graphics, digital signal processing, high-performance computing systems, and peripheral applications. The IS41LV16257B is packaged in a 40-pin, 400-mil SOJ and TSOP (Type II). APRIL 2005 KEY TIMING PARAMETERS Parameter -35 -60 Unit Max. RAS Access Time (tRAC)35 60 ns Max. CAS Access Time (tCAC)11 15 ns Max. Column Address Access Time (tAA)18 30 ns Min. Fast Page Mode Cycle Time (tPC)14 25 ns Min. Read/Write Cycle Time (tRC) 60 110 ns 256K x 16 (4-MBIT) DYNAMIC RAM WITH FAST PAGE MODE |
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