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IS41LV44052 Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS41LV44052 Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 17 page Integrated Silicon Solution, Inc. — 1-800-379-4774 1 Rev. C 06/24/01 ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc. IS41C4405X IS41LV4405X SERIES ISSI® FEATURES • Fast Page Mode Access Cycle • TTL compatible inputs and outputs • Refresh Interval: -- 2,048 cycles/32 ms -- 4,096 cycles/64 ms • Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden • Single power supply: 5V±10% or 3.3V ± 10% • Byte Write and Byte Read operation via two CAS • Industrial temperature range -40°C to 85°C DESCRIPTION The ISSI 4405x Series is a 4,194,304 x 4-bit high-performance CMOS Dynamic Random Access Memory. The Fast Page Mode allows 2,048 or 4096 random accesses within a single row with access cycle time as short as 20 ns per 4-bit word. These features make the 4405x Series ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications. The 4405x Series is packaged in a 24-pin 300-mil SOJ with JEDEC standard pinouts. 4M x 4 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE JUNE 2001 KEY TIMING PARAMETERS Parameter -50 -60 Unit RAS Access Time (tRAC)50 60 ns CAS Access Time (tCAC)13 15 ns Column Address Access Time (tAA) 25 30 ns Fast Page Mode Cycle Time (tPC) 20 25 ns Read/Write Cycle Time (tRC) 84 104 ns PRODUCT SERIES OVERVIEW Part No. Refresh Voltage IS41C44052 2K 5V ± 10% IS41C44054 4K 5V ± 10% IS41LV44052 2K 3.3V ± 10% IS41LV44054 4K 3.3V ± 10% 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC I/O0 I/O1 WE RAS *A11(NC) A10 A0 A1 A2 A3 VCC GND I/O3 I/O2 CAS OE A9 A8 A7 A6 A5 A4 GND * A11 is NC for 2K Refresh devices. PIN DESCRIPTIONS A0-A11 Address Inputs (4K Refresh) A0-A10 Address Inputs (2K Refresh) I/O0-3 Data Inputs/Outputs WE Write Enable OE Output Enable RAS Row Address Strobe CAS Column Address Strobe Vcc Power GND Ground NC No Connection PIN CONFIGURATION 24 (26) Pin SOJ |
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