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IS25C02-3GLA3 Datasheet(PDF) 4 Page - Integrated Silicon Solution, Inc |
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IS25C02-3GLA3 Datasheet(HTML) 4 Page - Integrated Silicon Solution, Inc |
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4 / 17 page  4 Integrated Silicon Solution, Inc. — 1-800-379-4774 Preliminary Information Rev. 00F 12/22/05 IS25C02 IS25C04 ISSI® STATUS REGISTER Table 1. Status Register Format Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit1 Bit 0 X XXX BP1 BP0 WEN RDY The status register contains 8-bits for write protection control and write status. (See Table 1). It is the only region of memory other than the main array that is accessible by the user. The Status Register is Read-Only if either: a) Hardware Write Protection is enabled or b) WEN is set to 0. If neither is true, it can be modified by a valid instruction. Ready ( RDY RDY RDY RDY RDY), Bit 0: When RDY = 1, it indicates that the device is busy with a write cycle. RDY = 0 indi- cates that the device is ready for an instruction. If RDY = 1, the only command that will be handled by the device is Read Status Register. Don’t Care, Bits 4-7: Each of these bits can receive either 0 or 1, but values will not be retained. When these bits are read from the register, they are always 0. Notes: 1. X = Don't care bit. 2. During internal write cycles, bits 0 to 7 are temporarily 1's. Block Protect (BP1, BP0), Bits 2-3: Together, these bits represent one of four block protection configurations implemented for the memory array. (See Table 2 for details.) BP0 and BP1 are non-volatile cells similar to regular array cells, and factory programmed to 0. The block of memory defined by these bits is always protected, regardless of the setting of WP or WEN. Table 2. Block Protection Status Register Bits Array Addresses Protected Level BP1 BP0 IS25C02 IS25C04 0 0 0 None None 1(1/4) 0 1 C0h 180h -FFh -1FFh 2(1/2) 1 0 80h 100h -FFh -1FFh 3(All) 1 1 00h 000h -FFh -1FFh Write Enable (WEN), Bit 1: This bit represents the status of device write protection. If WEN = 0, the Status Register and the entire array is protected from modifica- tion, regardless of the setting of WP pin or block protec- tion. The only way to set WEN to 1 is via the Write Enable command (WREN). WEN is reset to 0 upon power-up, successful completion of Write, WRDI, WRSR, or WP being Low. |
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