11

FN9260.0

March 9, 2006

Bus Transaction Protocol

The XSD bus for the ISL9206 defines three types of bus

transactions. Figure 10 shows the bus transaction protocol.

The blue color represents the signal sent by the host and the

green color stands for the signal sent by the device. Before

the transaction starts, the host should make sure that the

XSD device is not in the sleep mode. One method is to

always send a ‘break’ signal before starting the transaction,

as shown in Figure 10. If the device is not in the sleep mode,

the ‘break’ signal is not mandatory. The ‘break’ pulse width

may appear to be wider than what the host sends out

because of the reason explained in Figure 4. The symbols in

Figure 10 are explained in Table 7.

Passive CRC Support

The CRC feature only supports the read transaction in the

ISL9206. When the OPCODE in the instruction is ‘10’, an

8-bit CRC is automatically calculated for the data bytes

being transferred out. The CRC result is then appended after

the last data byte is read out.

CRC is generated using the DOW CRC polynomial as

follows:

The CRC generation algorithm is logically illustrated in

Figure 11. Prior to a new CRC calculation, the LFSR (linear

feedback shift register) is initialized to zero. The read data to

be transmitted out is concurrently shifted into the CRC

calculator. After the actual data is transmitted out, the final

content of the LFSR is the resulting CRC value. This value is

transmitted out after the read data, with LSB being

transmitted out first.

TABLE 7. SYMBOLS IN THE BUS TRANSACTION PROTOCOL

SYM

DESCRIPTION

MIN

TYP

MAX

800ms

800ms

FIGURE 10. XSD BUS TRANSACTION PROTOCOL. THE ‘BREAK’ SIGNAL IS OPTIONAL IF THE DEVICE IS AWAKE

IFGH

H

Write Instruction Frame

Data Frame 1

Data Frame 2

IFG

break

T

SD

D

TAD

Read Instruction Frame

Data Frame 1

(output from slave)

(output from slave)

Data Frame 2

IFG D

break

T

SD

(output from slave)

D

H

Read Instruction Frame

Data Frame

Next Instruction

Frame

TA

TA H

break

T

SD

(A) Multi-Byte Write Instruction.

(B) Multi-Byte Read Instruction.

(C) Back-to-Back Transaction (Read Followed by Write).

1st

Stage

2nd

Stage

3rd

Stage

4th

Stage

5th

Stage

7th

Stage

8th

Stage

Serial

Output

6th

Stage

LSB

MSB

FIGURE 11. THE CRC CALCULATOR FOR THE PASSIVE CRC SUPPORT

Data

Serial

ISL9206