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IS23SC4428-X8 Datasheet(PDF) 6 Page - Integrated Silicon Solution, Inc |
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IS23SC4428-X8 Datasheet(HTML) 6 Page - Integrated Silicon Solution, Inc |
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6 / 12 page  6 Integrated Silicon Solution, Inc. — 1-800-379-4774 REV. A 11/01/01 IS23SC4418 IS23SC4428 ISSI® RST I/O CLK Command Address Data S0 S1 S2 S3 S4 S5 A8 A9 A0 A1 A2 A3 A4 A5 A6 A7 D0 D1 D2 D3 D4 D5 D6 D7 01234 5 6 7 01234 5 6 7 01234 5 6 7 GENERAL COMMAND DESCRIPTIONS Read 8-Bits Data The read 8-bit data command allows the user to specify the address (A0-A9) of the data byte to be read from the device. The byte address for the next output data is automatically incremented after every eight clock pulses. The data is output in sequential order, with the data from address n followed by the data from address n+1. (See Figure 6.) Read 9-Bits Data with Protect Bit The read 9-bit data command operates similarly to read 8- bit data command except that the protect bit for each byte is output after each 8-bit data and the address for the next output data is incremented after every nine clock pulses. (See Figure 7.) Write/Erase Data Byte without Protect Bit The write/erase data byte without protect bit command writes the new data into the specified byte location. There are three kinds of write/erase operations which are automatically executed by the device: 1. Erase and subsequent write if 203 clock pulses at f < 20 KHz are applied. (See Figure 8.) 2. Write only if 103 clock pulses at f < 20 KHz are ap- plied. This operation is only suitable if single bits of one byte shall be changed only from 1 to 0. (See Figure 9.) 3. Erase only if the input data = FFH and 103 clock pulses at f < 20 KHz are applied. (See Figure 9.) Note: Erase means 0 → 1. Write means 1 → 0. If the protect bit of the corresponding byte location is enabled, the write/erase operation will have no effect on the content. Write/Erase Data Byte with Protect Bit The write/erase data byte with protect bit command operates similarly to the write/erase data bytewith protect bit command except that it also writes 0 to the corresponding protect bit. After the protect bit is set to 0 (write protection enabled), it cannot be changed again. (See Figures 8 and 9.) Write Protect Bit with Data Comparison The write protect bit with data comparison command writes 0 to the corresponding protect bit only if the input data and the data in the specified memory location are the same. After the protect bit is set to 0 (write protection enabled), it cannot be changed again. (See Figure 9.) The execution of write/erase commands are terminated after a given number of clock cycles. When the operation is done, the device will bring the I/O state to 0. Only RST transition from 0 to 1 can set the I/O state back to 1. Figure 5. Command Entry Sequence |
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