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74F125 Datasheet(PDF) 2 Page - NXP Semiconductors

Part No. 74F125
Description  Quad buffers 3-State
Download  10 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74F125 Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74F125, 74F126
Quad buffers (3-State)
2
March 28, 1989
853–0341 96146
FEATURE
High impedance NPN base inputs for reduced loading
(20
µA in High and Low states)
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F125
5.0ns
23mA
74F126
5.0ns
26mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
PKG DWG #
14-pin plastic DIP
N74F125N, N74F126N
SOT27-1
14-pin plastic SO
N74F125D, N74F126D
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
D0–D3
Data inputs
1.0/0.033
20
µA/20µA
OE0–OE3
Output Enable inputs (active Low), 74F125
1.0/0.033
20
µA/20µA
OE0–OE3
Output Enable inputs (active High), 74F126
1.0/0.033
20
µA/20µA
Q0–Q3
Data outputs
750/106.7
15mA/64mA
NOTE: One (1.0) FAST unit load is defined as: 20
µA in the High state and 0.6mA in the Low state.
PIN CONFIGURATIONS
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
VCC
OE2
D2
Q2
Q3
OE3
D3
OE0
D0
Q1
Q0
OE1
D1
SF00117
74F125
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
VCC
OE2
D2
Q2
Q3
OE3
D3
OE0
D0
Q1
Q0
OE1
D1
SF00118
74F126
LOGIC SYMBOLS
Q0
Q0
Q1
Q1
36
811
VCC = Pin 14
GND = Pin 7
1
4
10
13
OE0
OE1
OE2
OE3
D1
D2
912
SF00119
D3
D0
25
74F125
Q0
Q0
Q1
Q1
36
811
VCC = Pin 14
GND = Pin 7
1
4
10
13
OE0
OE1
OE2
OE3
D1
D2
912
SF00120
D3
D0
25
74F126


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