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CYV15G0203TB-BGC Datasheet(PDF) 11 Page - Cypress Semiconductor

Part # CYV15G0203TB-BGC
Description  Independent Clock Dual HOTLink II Serializer
Download  19 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYV15G0203TB-BGC Datasheet(HTML) 11 Page - Cypress Semiconductor

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PRELIMINARY
CYV15G0203TB
Document #: 38-02105 Rev. **
Page 11 of 19
Maximum Ratings
Above which the useful life may be impaired. User guidelines
only, not tested
Storage Temperature ..................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +3.8V
DC Voltage Applied to LVTTL Outputs
in High-Z State .......................................–0.5V to VCC + 0.5V
Output Current into LVTTL Outputs (LOW)..................60 mA
DC Input Voltage....................................–0.5V to VCC + 0.5V
Static Discharge Voltage.......................................... > 2000 V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA
Power-up Requirements
The CYV15G0203TB requires one power-supply. The Voltage
on any input or I/O pin cannot exceed the power pin during
power-up.
Operating Range
Range
Ambient Temperature
VCC
Commercial
0°C to +70°C
+3.3V ±5%
CYV15G0203TB DC Electrical Characteristics
Parameter
Description
Test Conditions
Min.
Max.
Unit
LVTTL-compatible Outputs
VOHT
Output HIGH Voltage
IOH = − 4 mA, VCC = Min.
2.4
V
VOLT
Output LOW Voltage
IOL = 4 mA, VCC = Min.
0.4
V
IOST
Output Short Circuit Current
VOUT = 0V[7], VCC = 3.3V
–20
–100
mA
IOZL
High-Z Output Leakage Current
VOUT = 0V, VCC
–20
20
µA
LVTTL-compatible Inputs
VIHT
Input HIGH Voltage
2.0
VCC + 0.3
V
VILT
Input LOW Voltage
–0.5
0.8
V
IIHT
Input HIGH Current
REFCLKx Input, VIN = VCC
1.5
mA
Other Inputs, VIN = VCC
+40
µA
IILT
Input LOW Current
REFCLKx Input, VIN = 0.0V
–1.5
mA
Other Inputs, VIN = 0.0V
–40
µA
IIHPDT
Input HIGH Current with internal pull-down
VIN = VCC
+200
µA
IILPUT
Input LOW Current with internal pull-up
VIN = 0.0V
–200
µA
LVDIFF Inputs: REFCLKx
±
VDIFF[8]
Input Differential Voltage
400
VCC
mV
VIHHP
Highest Input HIGH Voltage
1.2
VCC
V
VILLP
Lowest Input LOW voltage
0.0
VCC/2
V
VCOMREF[9] Common Mode Range
1.0
VCC – 1.2V
V
3-Level Inputs
VIHH
Three-Level Input HIGH Voltage
Min.
≤ VCC ≤ Max.
0.87 * VCC
VCC
V
VIMM
Three-Level Input MID Voltage
Min.
≤ VCC ≤ Max.
0.47 * VCC
0.53 * VCC
V
VILL
Three-Level Input LOW Voltage
Min.
≤ VCC ≤ Max.
0.0
0.13 * VCC
V
IIHH
Input HIGH Current
VIN = VCC
200
µA
IIMM
Input MID current
VIN = VCC/2
–50
50
µA
IILL
Input LOW current
VIN = GND
–200
µA
Differential CML Serial Outputs: OUTA1
±, OUTA2±, OUTB1±, OUTB2±, OUTC1±, OUTC2±, OUTD1±, OUTD2±
VOHC
Output HIGH Voltage
(Vcc Referenced)
100
Ω differential load
VCC – 0.5
VCC – 0.2
V
150
Ω differential load
VCC – 0.5
VCC – 0.2
V
VOLC
Output LOW Voltage
(VCC Referenced)
100
Ω differential load
VCC – 1.4
VCC – 0.7
V
150
Ω differential load
VCC – 1.4
VCC – 0.7
V
VODIF
Output Differential Voltage
|(OUT+)
− (OUT−)|
100
Ω differential load
450
900
mV
150
Ω differential load
560
1000
mV
7.
Tested one output at a time, output shorted for less than one second, less than 10% duty cycle.
8.
This is the minimum difference in voltage between the true and complement inputs required to ensure detection of a logic-1 or logic-0. A logic-1 exists when
the true (+) input is more positive than the complement (
−) input. A logic-0 exists when the complement (−) input is more positive than true (+) input.
9.
The common mode range defines the allowable range of REFCLKx+ and REFCLKx
− when REFCLKx+ = REFCLKx−. This marks the zero-crossing between
the true and complement inputs as the signal switches between a logic-1 and a logic-0.


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