Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

N74F112D Datasheet(PDF) 4 Page - NXP Semiconductors

Part # N74F112D
Description  Dual J-K negative edge-triggered flip-flop
Download  10 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

N74F112D Datasheet(HTML) 4 Page - NXP Semiconductors

  N74F112D Datasheet HTML 1Page - NXP Semiconductors N74F112D Datasheet HTML 2Page - NXP Semiconductors N74F112D Datasheet HTML 3Page - NXP Semiconductors N74F112D Datasheet HTML 4Page - NXP Semiconductors N74F112D Datasheet HTML 5Page - NXP Semiconductors N74F112D Datasheet HTML 6Page - NXP Semiconductors N74F112D Datasheet HTML 7Page - NXP Semiconductors N74F112D Datasheet HTML 8Page - NXP Semiconductors N74F112D Datasheet HTML 9Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 10 page
background image
Philips Semiconductors
Product specification
74F112
Dual J-K negative edge-triggered flip-flop
February 9, 1990
4
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
VCC
Supply voltage
–0.5 to +7.0
V
VIN
Input voltage
–0.5 to +7.0
V
IIN
Input current
–30 to +5
mA
VOUT
Voltage applied to output in High output state
–0.5 to VCC
V
IOUT
Current applied to output in Low output state
40
mA
T
Operating free air temperature range
Commercial range
0 to +70
°C
Tamb
Operating free-air temperature range
Industrial range
–40 to +85
°C
Tstg
Storage temperature range
–65 to +150
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5.0
5.5
V
VIH
High-level input voltage
2.0
V
VIL
Low-level input voltage
0.8
V
IIK
Input clamp current
–18
mA
IOH
High-level output current
–1
mA
IOL
Low-level output current
20
mA
T
Operating free air temperature range
Commercial range
0
+70
°C
Tamb
Operating free-air temperature range
Industrial range
–40
+85
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS1
MIN
TYP2
MAX
UNIT
VO
High level output voltage
VCC = MIN, VIL = MAX
±10%VCC
2.5
V
VOH
High-level output voltage
VIH = MIN, IOH = MAX
±5%VCC
2.7
3.4
V
VO
Low level output voltage
VCC = MIN, VIL = MAX
±10%VCC
0.35
0.50
V
VOL
Low-level output voltage
VIH = MIN, IOL = MAX
±5%VCC
0.35
0.50
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
–1.2
V
II
Input current at maximum input voltage
VCC = MAX, VI = 7.0V
100
µA
IIH
High-level input current
VCC = MAX, VI = 2.7V
20
µA
Jn, Kn
–0.6
mA
IIL
Low-level input current
CPn
VCC = MAX, VI = 0.5V
–2.4
mA
SDn, RDn
–3.0
mA
IOS
Short-circuit output current3
VCC = MAX
–60
–150
mA
ICC
Supply current (total)4
VCC = MAX
15
21
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
4. Measure ICC with the clock input grounded and all outputs open, with the Q and Q outputs High in turn.


Similar Part No. - N74F112D

ManufacturerPart #DatasheetDescription
logo
NXP Semiconductors
N74F113D PHILIPS-N74F113D Datasheet
81Kb / 10P
   Dual J-K negative edge-triggered flip-flops without reset
1991 Feb 14
N74F113N PHILIPS-N74F113N Datasheet
81Kb / 10P
   Dual J-K negative edge-triggered flip-flops without reset
1991 Feb 14
N74F114D PHILIPS-N74F114D Datasheet
51Kb / 6P
   Dual J-K negative edge-triggered flip-flop with common clock and reset
1996 Mar 14
N74F114N PHILIPS-N74F114N Datasheet
51Kb / 6P
   Dual J-K negative edge-triggered flip-flop with common clock and reset
1996 Mar 14
N74F11D PHILIPS-N74F11D Datasheet
72Kb / 8P
   Triple 3-input NAND gate
1989 Sep 20
More results

Similar Description - N74F112D

ManufacturerPart #DatasheetDescription
logo
NXP Semiconductors
74ALS112A PHILIPS-74ALS112A Datasheet
92Kb / 10P
   Dual J-K negative edge-triggered flip-flop
1991 Feb 08
logo
Texas Instruments
SN74F112NSR TI1-SN74F112NSR Datasheet
627Kb / 13P
[Old version datasheet]   DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
logo
Mitsubishi Electric Sem...
M74LS73AP MITSUBISHI-M74LS73AP Datasheet
220Kb / 4P
   DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOP WITH RESET
logo
Texas Instruments
CD54AC112 TI1-CD54AC112_14 Datasheet
903Kb / 15P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
logo
Fairchild Semiconductor
DM74ALS109A FAIRCHILD-DM74ALS109A Datasheet
55Kb / 6P
   Dual J-K Positive-Edge-Triggered Flip-Flop
logo
Texas Instruments
SN54LS112A TI1-SN54LS112A_15 Datasheet
1Mb / 20P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS
74ACT11112 TI-74ACT11112 Datasheet
75Kb / 5P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET
SN74F112 TI-SN74F112 Datasheet
73Kb / 5P
[Old version datasheet]   DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC112A TI-SN74LVC112A Datasheet
292Kb / 13P
[Old version datasheet]   DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
74ACT11112 TI1-74ACT11112_11 Datasheet
214Kb / 8P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET
More results


Html Pages

1 2 3 4 5 6 7 8 9 10


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com