012

34

5

0

1

2

3

4

5

6

7

180

O

= 180

o

= 120

o

=90

o

=60

o

=30

o

T(RMS)

I

(A)

P(W)

Fig.1 : Maximum RMS power dissipation versus

RMS on-state current.

0

10 20 30 40 50 60 70 80 90 100 110 120 130

0

1

2

3

4

5

6

= 180

o

Tcase( C)

o

I

(A)

T(RMS)

Fig.3 : RMS on-state current versus case tempera-

ture.

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

Igt

Tj( C)

o

Ih

-40

-20

0

20

40

60

80

100

120 140

Igt[Tj]

Igt[Tj=25 C]

o

Ih[Tj]

Ih[Tj=25 C]

o

Fig.5 : Relative variation of gate trigger current and

holding current versus junction temperature.

0

20

40

60

80

100

120

140

0

1

2

3

4

5

6

7

-100

-105

-110

-115

-120

-125

Rth = 0 C/W

5 C/W

10 C/W

15 C/W

o

o

o

o

Tamb ( C)

o

P(W)

Tcase ( C)

o

Fig.2 : Correlation between maximum RMS power

dissipation and maximum allowable temperature

(Tamb and Tcase) for different thermal resistances

heatsink + contact.

1E-3

1E-2

1E-1

1E +0

1 E +1

1E +2 5 E+2

0.01

0.1

1

Zth/Rth

Zt h( j-c )

Zt h( j-a )

tp (s )

Fig.4 : Relative variation of thermal impedance

versus pulse duration.

1

10

100

100 0

0

5

10

15

20

25

30

35

40

Tj initial = 25 C

o

Number of cycles

I

(A)

TSM

Fig.6 : Non repetitive surge peak on-state current

versus number of cycles.

®

T0505xH / T0509xH

3/5