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74AVC16835DGG Datasheet(PDF) 6 Page - NXP Semiconductors |
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74AVC16835DGG Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 10 page  Philips Semiconductors Preliminary specification 74AVC16835 18-bit Registered Driver (3-State) 1999 Jul 23 6 AC CHARACTERISTICS GND = 0V; tr = tf ≤ 2.0ns; CL = 30pF LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3 ± 0.3V VCC = 2.5 ± 0.2V VCC = 1.8 ± 0.15V VCC = 1.2V UNIT MIN TYP1 MAX MIN TYP1 MAX MIN TYP1 MAX TYP Propagation delay An to Yn 1, 7 0.7 1.7 2.5 0.8 2.0 3.0 1.0 2.6 4.5 5.2 tPHL/tPLH Propagation delay LE to Yn 2, 7 0.7 1.8 2.7 0.8 2.2 3.3 1.0 2.8 5.0 5.6 ns Propagation delay CP to Yn 3, 7 0.7 1.7 2.5 0.8 2.0 3.0 1.0 2.6 4.5 5.2 tPZH/tPZL 3-State output enable time OE to Yn 6, 7 1.0 2.3 4.0 1.0 2.5 4.5 1.5 3.0 6.5 5.5 ns tPHZ/tPLZ 3-State output disable time OE to Yn 6, 7 1.0 2.3 3.5 1.0 2.2 4.0 1.5 3.5 6.5 5.5 ns tW CP pulse width HIGH or LOW 3, 7 1.0 – – 1.2 – – 2.0 – – – ns W LE pulse width HIGH 2, 7 1.0 – – 1.2 – – 2.0 – – – tS Set-up time An to CP 5, 7 0.3 – – 0.4 – – 0.5 – – – ns tSU Set-up time An to LE 4, 7 0.3 – – 0.4 – – 0.5 – – – ns t Hold time An to CP 5, 7 0.3 – – 0.4 – – 0.5 – – ns th Hold time An to LE 4, 7 0.3 – – 0.4 – – 0.5 – – ns Fmax Maximum clock pulse frequency 3, 7 500 – – 400 – – 250 – – MHz NOTES: 1. All typical values are measured at Tamb = 25°C and at VCC = 1.8 V, 2.5 V, 3.3 V. AC WAVEFORMS FOR VCC = 3.0V TO 3.6V RANGE VM = 0.5 VCC VX = VOL + 0.300 V VY = VOH – 0.300 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND VCC < 2.3 V RANGE VM = 0.5 VCC VX = VOL + 0.15 V VY = VOH – 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC An INPUT tPHL tPLH VOL VI GND VOH Yn OUTPUT SH00132 VM VM NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V Waveform 1. Input (An) to output (Yn) propagation delay LE INPUT Yn OUTPUT VI GND VOH VOL tPHL tPLH tW SH00134 VM VM VM NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7V Waveform 2. Latch enable input (LE) pulse width, the latch enable input to output (Yn) propagation delays. |
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