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74ALVT16601DGG Datasheet(PDF) 3 Page - NXP Semiconductors |
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74ALVT16601DGG Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 14 page Philips Semiconductors Product specification 74ALVT16601 2.5V/3.3V 18-bit universal bus transceiver (3-State) 1998 Feb 13 3 PIN CONFIGURATION GND GND CEAB GND LEAB OEAB GND VCC VCC GND GND VCC VCC GND CEBA GND LEBA OEBA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 CPAB B0 B2 B1 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 CPBA SW00192 A0 FUNCTION TABLE INPUTS OUTPUT CEAB OEAB LEAB CPAB A B X H X X X Z X L H X L L X L H X H H H L L X X BO L L L ↑ L L L L L ↑ H H L L L H X BO L L L L X BO§ X = Don’t care H = High voltage level L = Low voltage level ↑ = Low to High Z = High impedance “off ” state † = A-to-B data flow is shown: B-to-A flow is similar but uses OEBA, LEBA, CPBA, and CEBA. = Output level before the indicated steady-state input conditions were established. § = Output level before the indicated steady-state input conditions were established, provided that CPAB was Low before LEAB went Low. |
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