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COIC5130A Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers
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COIC5130A Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers
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which is compatible with the Ampex 1295126-01 device. When pin 9 is
held to High level and pin 16 is low Latency 1 is invoked and the equa-
tion is changed to 2N +2r + 13 symbol clock cycles. Latency 2 is
involked if pin 16 is high regardless of the level of pin 9 and the equa-
tion is 3n/2 +3r/2 +15. Effects of optional shorter latency and mini-
mum code length ( OptLn ) : The combination of the shorter code and
latency can result in considerable increase in effective data transfer. In
most new designs the Latency1 or Latency 2 option will provide the best
Example: If a desired code is ( 64,48 ) r= 16, the default minimum block
length ( 5r + 33 ) is 95 bytes which requires 31 " filler " bytes to be
inserted in each block., a loss of over 33 % of the channel effectiveness.
The latency ( 2N+5r+33 ) is 313 clock cycles. With OptLn2 invoked the
minimum block length is 39 bytes , which does not require any filler
bytes so there is no loss of channel effectiveness. The latency is 135
After the COic5130A is initialized it can begin decoding incoming
blocks. It is a good idea, but not absolutely necessary, to pass at least as
many dummy symbols as the latency through the device before actual
data is used in order to clear out any spurious information in the unit.
Although it is not recommended, block of data can be used to initialize
the device can be made up of valid data, if step one has been complet-
To decode, the Enabln is brought high and held high throughout the
decoding secession. At the beginning of a code block DataEn is brought
high at the leading edge of the first symbol clock pulse and held high
while the data symbols are being clocked into the device, that is N-r
symbol clock pluses. DataEn is brought low with the first parity symbol
and held low for r symbol clock cycles while the parity symbols are
clocked into the decoder. DataEn‚s going highagain marks the end of
parity and the start of the next block.
The first data symbol is placed on the Dout bus, the DatRdy line will go
high and the unit will begin to output data symbols when the number
of symbol clocks required for processing latency are complete. At the
end of N-r symbols the DatRdy line goes low and parity symbols are
Correct pin --- goes high as the block starts being outputted if the block
contains corrected symbols or low if the block is outputted as it was
received due to either 0 or more than r errors in the block.
If the block cannot be corrected UnCorr, pin --- will go to the high level.
This will occurr as the block being processed starts to be outputted.
If StatEn has been set high the first two parity bytes will be replaced
with error information. Byte 1 will show FXXEEEEE and Byte 2 will
show FXXTTTTT where:
F = block Not Correctable if high, block was Corrected if low.
EEEEE = Erasure count will be 0.
TTTTT = Total number of corrections made in the block.
If the block was not correctable ( F bit is high ) E and T values will be
meaningless. If StatEn is low all of the corrected parity symbols will be
clocked out of the decoder.
Decoder Error Information Output
In order to help optimize the application ECC function, detailed error
information for each block is also available while the decoder data out-
put is in process. It is not necessary to use this information for proper
operation the part.
If the symbol being outputed from the decoder has been corrected
ErLoc (pin 24) will go high. The pattern used to correct that symbol will
apprear on CMag 0 -CMag7 pins at the same time. Note that the error is
actually the logical inverse of the correction. (The user must provide
external storage and processing of this information as the COic5130
does not store these error location or correction information outputs. If
the decoder detects more than r/2 errors ErLoc will remain low
throughout the block as no changes will be made. The UnCorr line or
Status bytes must be monitored to flag this condition.
Decoder Pass Through Mode ( r =0 )
Any number of symbols can be passed through the decoder without any
changes (corrections) if the Enable In ( Enabln ) is held low while sym-
bols are clocked into the device. The input symbols, data and parity if
any, will be passed unchanged to the output ( Dout ) after the number
of symbol clocks needed for processing latency. In this mode there will
normally not be any parity symbols. That will allow transfer of data
symbols at the maximum rate, but will not provide any error correction
To end Pass Through Mode operation Enabln must be brought high,
which will start the decoding process. This must be at the beginning of
a block for correct operations. Pass Through Mode may be invoked at
any time but any blocks in process when this mode is started will not be
When the last byte of a block is outputted EnOBK pin 22 will go to the
high level for one clock period.
Related Electronics Part Number
Sanyo Semicon Device
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