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74ALVT16543 Datasheet(PDF) 2 Page - NXP Semiconductors

Part No. 74ALVT16543
Description  2.5V/3.3V ALVT 16-bit registered transceiver 3-State
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74ALVT16543 Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74ALVT16543
2.5V/3.3V 16-bit registered transceiver (3-State)
2
1998 Feb 13
853-1823 18958
FEATURES
16-bit universal bus interface
5V I/O Compatible
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
No bus current loading when output is tied to 5V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ALVT16543 is a high-performance BiCMOS product
designed for VCC operation at 2.5V or 3.3V with I/O compatibility up
to 5V. The device can be used as two 8-bit transceivers or one
16-bit transceiver.
The 74ALVT16543 contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB) input and the A-to-B Latch
Enable (nLEAB) input are Low, the A-to-B path is transparent.
A subsequent Low-to-High transition of the nLEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With nEAB and nOEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA,
nLEBA, and nOEBA inputs.
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
SYMBOL
PARAMETER
Tamb = 25°C; GND = 0V
2.5V
3.3V
UNIT
tPLH
tPHL
Propagation delay
nAx to nBx or nBx to nAx
CL = 50pF
1.8
2.7
1.6
1.8
ns
CIN
Input capacitance DIR, OE
VI = 0V or VCC
3
3
pF
CI/O
I/O pin capacitance
Outputs disabled; VI/O = 0V or VCC
9
9
pF
ICCZ
Total supply current
Outputs disabled
40
70
µA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
–40
°C to +85°C
74ALVT16543 DL
AV16543 DL
SOT371-1
56-Pin Plastic TSSOP Type II
–40
°C to +85°C
74ALVT16543 DGG
AV16543 DGG
SOT364-1
LOGIC SYMBOL (IEEE/IEC)
∇ 9
11 D
5 D
56
54
55
1
3
2
5
29
26
27
28
31
30
6
8
9
10
12
13
14
52
51
49
48
47
45
44
15
16
17
19
20
21
23
43
24
42
41
40
38
37
36
34
33
∇ 3
1EN3 (BA)
G1
1C5
2EN4 (AB)
G2
2C6
6 D
4
7EN9 (BA)
G7
7C11
8EN10 (AB)
G8
8C12
12 D
10
SW00151


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