DA9122.002
7 September, 2001
6 (12)
APPLICATION INFORMATION
See also table External Capacitors on p. 4.
FUNCTIONS
x Reference voltage
The device is supplied with 3.1 V to 5.3 V battery
under normal conditions. An internal bandgap
voltage reference is routed via 20 kOhm resistor to
an external pin, where a filter capacitor can be
connected in order to reduce noise level of all
regulators. The startup time of the reference
voltage is then determined by the value of the
bypass capacitor at pin VREF.
x Enable pins
Each regulator can be enabled/disabled by two
enable pins ENA and ENBC. Pin ENA controls
regulator LDO_A and pin ENBC controls both
regulator LDO_B and LDO_C. If both enable pins
are forced low, the whole circuit goes into power
saving sleep-mode. In the table below all functional
modes are presented.
x Regulators
The device contains three low dropout CMOS
regulators, with maximum output currents of 135
mA, 70 mA and 50 mA. Three different output
voltage options are available by mask option:
2.70 V, 2.85 V and 3.00 V.
x Logic Table for Enable Inputs
ENA
ENBC
LDO_A
LDO_B
LDO_C
VREF
1
1
ON
ON
ON
ON
1
0
ON
OFF
OFF
ON
0
1
OFF
ONONON
0
0
OFF
OFF
OFF
OFF
VIN 3.1 V ... 5.3 V
1 uF
1 uF
10 nF
ENA
ENBC
OUTA
OUTB
OUTC
VREF
VIN
GND
MAS9122
1 uF
1 uF
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