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HN58X2508I Datasheet(PDF) 14 Page - Renesas Technology Corp |
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HN58X2508I Datasheet(HTML) 14 Page - Renesas Technology Corp |
14 / 29 page ![]() HN58X2508I/HN58X2516I Rev.2.00, Aug.19.2004, page 14 of 27 Instruction Set Instruction Description Instruction Format WREN Write Enable 0000 0110 WRDI Write Disable 0000 0100 RDSR Read Status Register 0000 0101 WRSR Write Status Register 0000 0001 READ Read from Memory Array 0000 0011 WRITE Write to Memory Array 0000 0010 Write Enable (WREN): The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is to send a Write Enable instruction to the device. As shown in the following figure, to send this instruction to the device, chip select ( S) is driven low, and the bits of the instruction byte are shifted in, on serial data input (D). The device then enters a wait state. It waits for the device to be deselected, by chip select ( S) being driven high. Write Enable (WREN) Sequence S W C D Q Instruction 01 2 3 4 5 6 High-Z V IH V IL V IH V IL V IH V IL V IH V IL 7 |
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