Rev.2.00, Aug.19.2004, page 12 of 27
Serial data output (Q)
This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of
serial clock (C).
Serial data input (D)
This input signal is used to transfer data serially into the device. It receives instructions, addresses, and the
data to be written. Values are latched on the rising edge of serial clock (C).
Serial clock (C)
This input signal provides the timing of the serial interface. Instructions, addresses, or data present at serial
data input (D) are latched on the rising edge of serial clock (C). Data on serial data output (Q) changes after
the falling edge of serial clock (C).
Chip select (
When this input signal is high, the device is deselected and serial data output (Q) is at high impedance.
Unless an internal write cycle is in progress, the device will be in the standby mode. Driving chip select (
low enables the device, placing it in the active power mode. After power-up, a falling edge on chip select (
is required prior to the start of any instruction.
The hold (
HOLD) signal is used to pause any serial communications with the device without deselecting the
device. During the hold condition, the serial data output (Q) is high impedance, and serial data input (D) and
serial clock (C) are don’t care. To start the hold condition, the device must be selected, with chip select (
Write protect (
The main purpose of this input signal is to freeze the size of the area of memory that is protected against write
instructions (as specified by the values in the BP1 and BP0 bits of the status register). This pin must be
driven either high or low, and must be stable during all write operations.