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IPS03N03LAG Datasheet(PDF) 1 Page - Infineon Technologies AG |
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IPS03N03LAG Datasheet(HTML) 1 Page - Infineon Technologies AG |
1 / 10 page IPD03N03LA G IPS03N03LA G OptiMOS®2 Power-Transistor Features • Ideal for high-frequency dc/dc converters • Qualified according to JEDEC 1) for target applications • N-channel, logic level • Excellent gate charge x R DS(on) product (FOM) • Superior thermal resistance • 175 °C operating temperature • Pb-free lead plating; RoHS compliant Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Unit Continuous drain current I D T C=25 °C 2) 90 A T C=100 °C 90 Pulsed drain current I D,pulse T C=25 °C 3) 360 Avalanche energy, single pulse E AS I D=90 A, R GS=25 Ω 300 mJ Reverse diode dv /dt dv /dt I D=90 A, V DS=20 V, di /dt =200 A/µs, T j,max=175 °C 6 kV/µs Gate source voltage 4) V GS ±20 V Power dissipation P tot T C=25 °C 115 W Operating and storage temperature T j, T stg -55 ... 175 °C IEC climatic category; DIN IEC 68-1 55/175/56 Value V DS 25 V R DS(on),max (SMD Version) 3.2 m Ω I D 90 A Product Summary Type IPD03N03LA G IPS03N03LA G Package P-TO252-3-11 P-TO251-3-11 Marking 03N03LA 03N03LA Rev. 1.2 page 1 2006-05-11 |
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