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K6F1016U4B Datasheet(PDF) 2 Page - Samsung semiconductor |
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K6F1016U4B Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 9 page Revision 0.0 CMOS SRAM May 2000 K6F1016U4B Family - 2 - Preliminary 64K x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM GENERAL DESCRIPTION The K6F1016U4B families are fabricated by SAMSUNG ′s advanced full CMOS process technology. The families support industrial temperature range and 48 ball Chip Scale Package for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current. FEATURES • Process Technology: Full CMOS • Organization: 64K x16 bit • Power Supply Voltage: 2.7~3.3V • Low Data Retention Voltage: 1.5V(Min) • Three state output status and TTL Compatible • Package Type: 48-FBGA-6.00x7.00 PIN DESCRIPTION FUNCTIONAL BLOCK DIAGRAM 48-CSP - Top View LB OE A0 A1 A2 DNU I/O9 UB A3 A4 CS I/O1 I/O10 I/O11 A5 A6 I/O2 I/O3 Vss I/O12 DNU A7 I/O4 Vcc Vcc I/O13 DNU DNU I/O5 Vss I/O15 I/O14 A14 A15 I/O6 I/O7 I/O16 DNU A12 A13 WE I/O8 DNU A8 A9 A10 A11 DNU 1 2 3 4 5 6 A B C D E F G H SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice . Name Function Name Function CS Chip Select Input Vcc Power OE Output Enable Input Vss Ground WE Write Enable Input UB Upper Byte(I/O9~16) A0~A15 Address Inputs LB Lower Byte(I/O1~8) I/O1~I/O16 Data Inputs/Outputs DNU Do Not Use Precharge circuit. Memory array 1024 rows 64 × 16 columns I/O Circuit Column select Clk gen. Row select WE OE UB CS I/O1~I/O8 Data cont Data cont Data cont LB I/O9~I/O16 Vcc Vss Row Addresses Control Logic Column Addresses PRODUCT FAMILY 1. The parameter is measured with 30pF test load. Product Family Operating Temperature Vcc Range Speed Power Dissipation PKG Type Standby (ISB1, Typ.) Operating (ICC1, Max) K6F1016U4B-F Industrial(-40~85 °C) 2.7~3.3V 551)/70ns 0.5 µA 4mA 48-FBGA-6.00x7.00 |
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