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74ALS174N Datasheet(PDF) 5 Page - NXP Semiconductors |
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74ALS174N Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 8 page Philips Semiconductors Product specification 74ALS174 Hex D flip-flop 1991 Feb 08 5 AC WAVEFORMS For all waveforms, VM = 1.3V. The shaded areas indicate when the input is permitted to change for predictable output performance. CP VM VM VM tw(H) 1/fmax VM VM tPLH tw(L) tPHL Qn SF00294 Waveform 1. Propagation Delay for Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency VM SC00065 MR Qn VM tw(L) tPHL VM tREC CP VM Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay, and Master Reset to Clock Recovery Time th(H) tsu(H) CP SC00064 VM VM VM VM VM VM th(L) tsu(L) Dn Waveform 3. Data Setup and Hold Times TEST CIRCUIT AND WAVEFORMS tw 90% VM 10% 90% VM 10% 90% VM 10% 90% VM 10% NEGATIVE PULSE POSITIVE PULSE tw AMP (V) 0.3V 0.3V tTHL (tff) INPUT PULSE REQUIREMENTS Rep.Rate tw tTLH tTHL 1MHz 500ns 2.0ns 2.0ns Input Pulse Definition VCC Family 74ALS D.U.T. PULSE GENERATOR RL CL RT VIN VOUT Test Circuit for Totem-pole Outputs DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. tTHL (tf ) tTLH (tr ) tTLH (tr ) AMP (V) Amplitude 3.5V 1.3V VM SC00005 |
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