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74AHC123A Datasheet(PDF) 2 Page - NXP Semiconductors

Part No. 74AHC123A
Description  Dual retriggerable monostable multivibrator with reset
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74AHC123A Datasheet(HTML) 2 Page - NXP Semiconductors

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2000 Mar 15
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator
with reset
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V
• All inputs have Schmitt-trigger actions
• Inputs accept voltages higher than VCC
• For AHC only: operates with CMOS input levels
• For AHCT only: operates with TTL input levels
• Specified from −40 to +85 °C and −40 to +125 °C
• DC triggered from active HIGH or active LOW inputs
• Retriggerable for very long pulses up to 100% duty
• Direct reset terminates output pulse
• Output capability: standard (except for nREXT/CEXT).
The 74AHC/AHCT123A are high-speed Si-gate CMOS
devices and are pin compatible with Low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no.7A.
The 74AHC/AHCT123A are dual retriggerable monostable
multivibrators with output pulse width control by three
methods. The basic pulse time is programmed by
selection of an external resistor (REXT) and capacitor
(CEXT). The external resistor and capacitor are normally
connected as shown in Fig.6.
Once triggered, the basic output pulse width may be
extended by retriggering the gated active LOW-going edge
input (nA) or the active HIGH-going edge input (nB).
By repeating this process, the output pulse period
(nQ = HIGH, nQ = LOW) can be made as long as desired.
Alternatively an output delay can be terminated at any time
by a LOW-going edge on input nRD, which also inhibits the
An internal connection from nRD to the input gate makes it
possible to trigger the circuit by a positive-going signal at
input nRD as shown in the function table. Figs 8 and 9
illustrate pulse control by retriggering and early reset. The
basic output pulse width is essentially determined by the
value of the external timing components REXT and CEXT.
When CEXT ≥ 10 nF, the typical output pulse width is
defined as: tW =REXT × CEXT where tW = pulse width in ns;
REXT = external resistor in kΩ; CEXT = external capacitor
in pF. Schmitt-trigger action at all inputs makes the circuit
highly tolerant to slower input rise and fall times. The ‘123’
is identical to the ‘423’ but can be triggered via the reset

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