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74ABT544PW Datasheet(PDF) 5 Page - NXP Semiconductors |
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74ABT544PW Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 8 page 9397 750 14756 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 03 — 20 April 2005 5 of 19 Philips Semiconductors 74ABT544 Octal latched transceiver with dual enable; inverting; 3-state 7. Functional description 7.1 Function table [1] H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition; X = don’t care; ↑ = LOW-to-HIGH clock transition; NC = no change; Z = high-impedance OFF-state. B3 19 port B, 3-state output 3 B2 20 port B, 3-state output 2 B1 21 port B, 3-state output 1 B0 22 port B, 3-state output 0 EBA 23 B-to-A enable input (active LOW) VCC 24 supply voltage Table 3: Pin description …continued Symbol Pin Description Table 4: Function table [1] Status Control Input Output OExx Exx LExx An or Bn An or Bn Disabled H XXXZ XH XXZ Disabled + latch L ↑ LhZ lZ Latch + display L L ↑ hL lH Transparent LLLH L LH Hold L L H X NC |
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