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XRK69773CR Datasheet(PDF) 1 Page - Exar Corporation |
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XRK69773CR Datasheet(HTML) 1 Page - Exar Corporation |
1 / 12 page Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com PRELIMINARY XRK69773 1:12 LVCMOS PLL CLOCK GENERATOR APRIL 2006 REV. P1.0.0 GENERAL DESCRIPTION The XRK69773 is a PLL based LVCMOS Clock Generator targeted for high performance and low skew clock distribu- tion applications. The XRK69773 can select between one of three reference inputs and provides 14 LVCMOS outputs -12 outputs (3 banks of 4) for clock distribution, 1 for feed- back and 1 for synchronization. The XRK69773 is a highly flexible device. It has 3 select- able inputs, (one differential and two single-ended inputs) to support system clock redundancy. Up to three different clock frequencys can be generated and outputted on the three output banks. Switching the internal reference clock is controlled by the control input, CLK_SEL. The XRK69773 uses PLL technology to frequency lock its outputs to the input reference clock. The divider in the feed- back path will determine the frequency of the VCO. Each of the separate output banks can individually divide down the VCO output frequency. This allows the XRK69773 to gen- erate a multitude of different bank frequency ratios and out- put-to-input frequency ratios. The outputs of the XRK69773 can individually be immobi- lized, in the low state, by use of the clock stop feature. All outputs except QC0 and QFB can be immobilized through a 2 pin serial interface. Global output disabling and reset can be achieved the control input MR/OE. The XRK69773 also has a QSYNC output which can be used for system synchronization purposes. It monitors Bank A and Bank C outputs and goes low one period of the faster clock prior to coincident rising edges of Bank A and Bank C clocks. QSYNC then goes high again when the coincident rising edges of Bank A and Bank C occur. This feature is used primarily in applications where Bank A and Bank C are running at different frequencies, and is particularly useful when they are running at non-integer multiples of one another. The XRK69773 has an output frequency range of 8.33MHz to 240MHz and an input frequency range of 5MHz to 120MHz. FEATURES • Fully Integrated PLL • Selectable Differential PECL or LVCMOS inputs for reference clock source • 14 LVCMOS outputs ■ 3 banks with 4 outputs each. Frequencies can be individually controlled by bank ■ 1 dedicated feedback with frequency control ■ 1 Sync • VCO Range 200MHz to 480MHz • Output freq. range: 8.33MHz to 240MHz • Max Output Skew of 250ps • Cycle-to-cycle jitter: 150ps (typ) APPLICATIONS • System Clock generator • Zero Delay Buffer PRODUCT ORDERING INFORMATION PRODUCT NUMBER PACKAGE TYPE OPERATING TEMPERATURE RANGE XRK69773CR 52-LEAD LQFP 0°C to +70°C XRK69773IR 52-LEAD LQFP -40°C to +85°C |
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