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XRK69773 Datasheet(PDF) 6 Page - Exar Corporation

Part # XRK69773
Description  1:12 LVCMOS PLL CLOCK GENERATOR
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRK69773 Datasheet(HTML) 6 Page - Exar Corporation

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XRK69773
PRELIMINARY
6
1:12 LVCMOS PLL CLOCK GENERATOR
REV. P1.0.0
NOTES:
a. PLL locked, except when configured in bypass mode.
b. t(Ø)[s] = t(Ø)[°] ÷ (fref x 360°)
c. Not including Qsync output
d. T is the output period.
TABLE 5: AC CHARACTERISTICS (CON’T) (VDD = 3.3V +/- 5%)
SYMBOL
CHARACTERISTICS
CONDITION
MIN
TYP
MAX
UNIT
tPLZ, tPHZ
Output Disable Time
8
ns
tPZL, tPZH
Output Enable Time
8
ns
tJIT(CC)
Cycle-to-Cycle Jitter
All outputs in same divider
config.
150
200
ps
tJIT(PER)
Period Jitter
All outputs in same divider
config.
150
ps
tJIT(Ø)
I/O Phase Jitter RMS (1
σ)
VCO = 400MHz
÷4 feedback
÷6 feedback
÷8 feedback
÷10 feedback
÷12 feedback
÷16 feedback
÷20 feedback
÷24 feedback
÷32 feedback
÷40 feedback
11
86
13
88
16
19
21
22
27
30
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
BW
PLL closed loop bandwidth
÷4 feedback
÷6 feedback
÷8 feedback
÷10 feedback
÷12 feedback
÷16 feedback
÷20 feedback
÷24 feedback
÷32 feedback
÷40 feedback
1.20-3.50
0.70-2.50
0.50-1.80
0.45-1.20
0.30-1.00
0.25-0.70
0.20-0.55
0.17-0.40
0.12-0.30
0.11-0.28
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
tLOCK
PLL Lock Time
10
ms
FIGURE 3. TEST LOAD
V
TT
Z = 50
Ω
Transmission Line
50
Ω


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