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XR17V252 Datasheet(PDF) 64 Page - Exar Corporation |
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XR17V252 Datasheet(HTML) 64 Page - Exar Corporation |
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64 / 69 page  XR17V252 64 66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT REV. 1.0.1 FIGURE 24. TRANSMIT DATA INTERRUPT AT TRIGGER LEVEL FIGURE 25. RECEIVE DATA READY INTERRUPT AT TRIGGER LEVEL STOP BIT PARITY BIT DATA BITS (5-8) D0 D1 D2 D3 D4 D5 D6 D7 5 DATA BITS 6 DATA BITS 7 DATA BITS START BIT TX Data NEXT DATA START BIT TX Interrupt at Transmit Trigger Level BAUD RATE CLOCK of 16X or 8X TXNOFIFO-1 Set at Below Trigger Level Clear at Above Trigger Level STOP BIT PARITY BIT DATA BITS (5-8) D0 D1 D2 D3 D4 D5 D6 D7 START BIT RX Data Input First byte that reaches the trigger level RX Data Ready Interrupt at Receive Trigger Level RXFIFO1 De-asserted at below trigger level Asserted at above trigger level |
Similar Part No. - XR17V252 |
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Similar Description - XR17V252 |
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