HSD8M64D8H-13 datasheet(6/10 Pages) HANBIT

Part #	HSD8M64D8H-13

Description	Synchronous DRAM Module 64Mbyte (8Mx64bit), DIMM based on 8Mx8,4Banks, 4K Ref., 3.3V

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Manufacturer	HANBIT [Hanbit Electronics Co.,Ltd]

Direct Link	http://www.hbe.co.kr

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HANBit

HSD8M64D8H

URL:www.hbe.co.kr

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HANBit Electronics Co.,Ltd.

REV.1.0(August.2002)

ICC3P

CKE

≤ V

IL(max), tCC=10ns

24

Active standby current in

power-down mode

ICC3PS

CKE&CLK

≤ V

IL(max),tCC=∞

24

mA

ICC3N

CKE

≥V

IH(min),

CS*

≥V

IH(min),

tCC=10ns

Input signals are changed

one time during 20ns

200

Active standby current in

non power-down mode

(One bank active)

ICC3NS

CKE

≥VIH(min)

CLK

≤VIL(max), t

CC=∞

Input signals are stable

120

mA

Operating current

(Burst mode)

ICC4

IO = 0 mA

Page burst

4Banks Activated

tCCD = 2CLKs

920

760

mA

1

Refresh current

ICC5

tRC ≥ tRC(min)

1080

1000

mA

2

Self refresh current

ICC6

CKE

≤ 0.2V

8

mA

Notes:

1. Measured with outputs open.

2. Refresh period is 64ms.

3. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).

AC OPERATING TEST CONDITIONS

(vcc = 3.3V

± 0.3V, TA = 0 to 70° C)

PARAMETER

Value

UNIT

AC Input levels (Vih/Vil)

2.4/0.4

V

Input timing measurement reference level

1.4

V

Input rise and fall time

tr/tf = 1/1

ns

Output timing measurement reference level

1.4

V

Output load condition

See Fig. 2

+3.3V

1200

Ω

870

Ω

50pF*

DOUT

Vtt=1.4V

50

Ω

50pF

DOUT

Z0=50

Ω

VOH (DC) = 2.4V, IOH = -2mA

VOL (DC) = 0.4V, IOL = 2mA

(Fig. 1) DC output load circuit

(Fig. 2) AC output load circuit

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