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IDT72V70190 Datasheet(PDF) 16 Page - Integrated Device Technology

Part No. IDT72V70190
Description  3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 256 x 256
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT72V70190 Datasheet(HTML) 16 Page - Integrated Device Technology

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COMMERCIALTEMPERATURERANGE
IDT72V70190 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 256 x 256
tALW
ADDRESS
DATA
tADS
tADH
ALE
5717 drw11
tRW
tWW
tCSRW
tALRD
tCSR
tCSW
tDHW
tDHR
tAKH
tDDR
tDSW
tSWD
tALWR
tAKD
AD0-AD7
D8-D15
CS
RD
WR
DTA
Figure 11. Multiplexed Bus Timing (Intel Mode)
AC ELECTRICAL CHARACTERISTICS - MULTIPLEXED BUS TIMING (INTEL)
NOTE:
1. High Impedance is measured by pulling to the appropriate rail with R
L, with timing corrected to cancel time taken to discharge CL.
Symbol
Parameter
Min.
Typ.
Max.
Units
Test Conditions
tALW
ALE Pulse Width
20
ns
tADS
Address Setup from ALE falling
3
ns
tADH
Address Hold from ALE falling
3
ns
tALRD
RD Active after ALE falling
3
ns
tDDR
Data Setup from
DTA LOW on Read
5
ns
CL = 150pF
tCSRW
CS Hold after RD/WR
5ns
tRW
RD Pulse Width (Fast Read)
45
ns
tCSR
CS Setup from RD
0ns
tDHR(1)
Data Hold after
RD
10
20
ns
CL = 150pF, RL = 1K
tWW
WR Pulse Width (Fast Write)
45
ns
tALWR
WR Delay after ALE falling
3
ns
tCSW
CS Setup from WR
0ns
tDSW
Data Setup from
WR (FastWrite)
20
ns
tSWD
Valid Data Delay on Write (Slow Write)
122
ns
tDHW
Data Hold after
WR Inactive
5
ns
tAKD
Acknowledgment Delay:
Reading/WritingRegisters
43/43
ns
CL = 150pF
Reading/Writing Memory
760/750
ns
CL = 150pF
tAKH(1)
Acknowledgment Hold Time
22
ns
CL = 150pF, RL = 1K


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