HDD128M72D18RPW-13B datasheet(6/14 Pages) HANBIT

Part #	HDD128M72D18RPW-13B

Description	DDR SDRAM Module 1024Mbyte (128Mx72bit), based on 64Mx8, 4Banks, 8K Ref., 184Pin-DIMM with PLL & Register

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Manufacturer	HANBIT [Hanbit Electronics Co.,Ltd]

Direct Link	http://www.hbe.co.kr

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HANBit

HDD128M72D18RPW

URL : www.hbe.co.kr

6

HANBit Electronics Co.,Ltd.

REV 1.0 (January. 2005)

Input / Output Capacitance

(VDD = min to max, VDDQ = 2.5V to 2.7V, TA = 25°C, f = 100MHz)

DESCRIPTION

SYMBOL

MIN

MAX

UNITS

Input capacitance(A0~A12, BA0~BA1, /RAS, /CAS,/WE)

CIN1

9

11

pF

Input capacitance(CKE0,CKE1)

CIN2

9

11

pF

Input capacitance(/CS0)

CIN3

9

11

pF

Input capacitance(CK0~CK2, /CK0~/CK2)

CIN4

11

12

pF

Input capacitance(DM0~DM7)

CIN5

14

16

pF

Data input/output capacitance (DQ0 ~ DQ63, DQS0~DQS7)

COUT1

14

16

pF

Data input/output capacitance (CB0~CB7)

COUT2

14

16

pF

DC Characteristics

(VDD = 2.7V, T =10°C)

Symbol

-16B

(DDR333@CL=2.5)

-13A

(DDR266@CL=2.0)

-13B

(DDR266@CL=2.5)

Unit

Notes

IDD0

2230

2010

mA

IDD1

2500

2280

mA

IDD2P

590

540

mA

IDD2F

1420

1290

mA

IDD2Q

950

900

mA

IDD3P

1040

990

mA

IDD3N

1690

1560

mA

IDD4R

2540

2280

mA

IDD4W

2630

2330

mA

IDD5

3130

2910

mA

Normal

590

540

mA

IDD6

Low

Power

560

510

mA

Optional

IDD7A

4520

4080

mA

Notes: Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap.

AC Operating Conditions

PARAMETER

STMBOL

MIN

MAX

UNIT

NOTE

Input High (Logic 1) Voltage, DQ, DQS and DM signals

VIH (AC)

VREF + 0.35

Input Low (Logic 0) Voltage, DQ, DQS and DM signals.

VIL (AC)

VREF - 0.31

V

Input Differential Voltage, CK and CK inputs

VID (AC)

0.7

VDDQ+0.6

V

1

Input Crossing Point Voltage, CK and CK inputs

VIX (AC)

0.5*VDDQ-0.2

0.5*VDDQ+0.2

V

2

Notes:

1. VID is the magnitude of the difference between the input level on CK and the input on /CK.

The value of VIX is expected to equal 0.5* VDDQ of the transmitting device and must track variations in the DC level of the same

3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in simula-tion.

the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.

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HDD128M72D18RPW-13B Datasheet(PDF) 6 Page - Hanbit Electronics Co.,Ltd

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