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74AC74MTR Datasheet(PDF) 1 Page - STMicroelectronics

Part No. 74AC74MTR
Description  DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

74AC74MTR Datasheet(HTML) 1 Page - STMicroelectronics

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April 2001
s
HIGH SPEED:
fMAX = 300MHz (TYP.) at VCC =5V
s
LOW POWER DISSIPATION:
ICC =2µA(MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH =VNIL =28 % VCC (MIN.)
s
50
Ω TRANSMISSION LINE DRIVING
CAPABILITY
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL = 24mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s
OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC74 is an advanced high-speed CMOS
DUAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR
fabricated with sub-micron silicon gate
and double-layer metal wiring C2MOS tecnology.
A signal on the D INPUT is transferred to the Q
and Q OUTPUTS during the positive going
transition of the clock pulse.
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriate input.
All
inputs
and
outputs
are
equipped
with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74AC74
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
74AC74B
SOP
74AC74M
74AC74MTR
TSSOP
74AC74TTR
TSSOP
DIP
SOP


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