1

Typical Connection Diagram

LOAD

14

13

12

11

10

9

8

1

2

3

4

5

6

7

VCC

CT

RT

LO1

LO2

SD

VB1

HO1

VS1

VB2

HO2

VS2

COM

NC

+ AC rectified line

- AC rectified line

15V

*

Please note that this datasheet contains advanced information which could change before the

Data Sheet No. PD

60259

ADVANCE INFORMATION

IRS2453D(S)PbF

SELF-OSCILLATING FULL-BRIDGE DRIVER IC

Features

Integrated 600V Full-Bridge Gate Driver

CT, RT programmable oscillator

15.6V Zener Clamp on VCC

Micropower Startup

Logic Level Latched Shutdown Pin

Non-latched shutdown on CT pin (1/6th VCC)

Internal bootstrap FETs

Excellent Latch Immunity on All Inputs & Outputs

ESD Protection on All Pins

14-lead SOIC or PDIP package

1.0 usec (typ.) internal deadtime

Description

The IRS2453D is based on the popular IR2153 self-oscillating

half-bridge gate driver IC, and incorporates a high voltage full-

bridge gate driver with a front end oscillator similar to the

industry standard CMOS 555 timer. HVIC and latch immune

CMOS technologies enable ruggedized monolithic construction.

The output driver features a high pulse current buffer stage

designed for minimum driver cross-conduction. Noise immunity

is achieved with low di/dt peak of the gate drivers, and with a

undervoltage lockout hysteresis greater than 1.5V. The

IRS2453D also includes latched and non-latched shutdown pins.

Package

14 Lead PDIP

14 Lead SOIC

IRS2453DPbF

(Narrow Body)

IRS2453DSPbF