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CDC930 Datasheet(PDF) 6 Page - Texas Instruments

Part No. CDC930
Description  133-MHz DIFFERENTIAL CLOCK SYNTHESIZER / DRIVER FOR PC MOTHERBOARDS WITH 3-STATE OUTPUTS
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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CDC930 Datasheet(HTML) 6 Page - Texas Instruments

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SCAS641
– JULY 2000
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 2)
MIN
NOM†
MAX
UNIT
Supply voltage, VDD
3.135
3.465
V
High-level input voltage, VIH
2
VDD +
0.3 V
V
Low-level input voltage, VIL
GND
0.3 V
0.8
V
Input voltage, VI
0
VDD
V
HCLK/HCLK
–20
High level output currentIOH
3VMREF/3VMREF
–15
mA
High-level output current, IOH
48MHz, REFx
–16
mA
PCIx, 3V66x
–15
HCLK/HCLK
5
A
Low level output currentIOL
3VMREF/3VMREF
10
Low-level output current, IOL
48MHz, REFx
10
mA
PCIx, 3V66x
10
Reference frequency, f(XIN)‡
Test mode
14
MHz
Crystal frequency, f(XTAL)§
Normal mode
13.8
14.318
14.8
MHz
Operating free-air temperature, TA
0
85
C
† All nominal values are measured at their respective nominal VDD values.
‡ Reference frequency is a test clock driven on the XIN input during the device test mode and normal mode. In test mode, XIN can be driven
externally up to f(XIN) = 16 MHz. If XIN is driven externally, XOUT is floating.
§ This is a series fundamental crystal with fO = 14.31818 MHz.
NOTES:
4. Unused inputs must be held high or low to prevent them from floating.
5.VIH, VIL: All input levels referenced to VDD = 3.30 V.


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