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DM9000C Datasheet(PDF) 32 Page - Davicom Semiconductor, Inc. |
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DM9000C Datasheet(HTML) 32 Page - Davicom Semiconductor, Inc. |
32 / 63 page DM9000C/CI Industrial-Temperature Ethernet Controller with General Processor Interface Final 32 Version: DM9000C/CI-13-DS-F01 December 12, 2012 7 PAR PS0,RW Enable the SRAM read/write pointer to automatically return to the start address when pointer addresses are over the SRAM size. Driver needs to set. When driver sets this bit, REG_F5 will set to 0Ch automatically 1: ENABLE 0: DISABLE 6 RESERVED RO Reserved 5 LNKCHGI PS0,RW Enable Link Status Change Interrupt 1: ENABLE 0: DISABLE 4 UDRUNI PS0,RW Enable Transmit Under-run Interrupt 1: ENABLE 0: DISABLE 3 ROOI PS0,RW Enable Receive Overflow Counter Overflow Interrupt 1: ENABLE 0: DISABLE 2 ROI PS0,RW Enable Receive Overflow Interrupt 1: ENABLE 0: DISABLE 1 PTI PS0,RW Enable Packet Transmitted Interrupt 1: ENABLE 0: DISABLE 0 PRI PS0,RW Enable Packet Received Interrupt 1: ENABLE 0: DISABLE |
Similar Part No. - DM9000C |
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Similar Description - DM9000C |
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