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ES29LV800D Datasheet(PDF) 33 Page - Excel Semiconductor Inc. |
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ES29LV800D Datasheet(HTML) 33 Page - Excel Semiconductor Inc. |
33 / 50 page ES I ES I 33 Rev. 1D January 5, 2006 ES29LV800D Excel Semiconductor inc. AC CHARACTERISTICS Table 12. Erase and Program Operations Parameter Description 70 90 120 Unit JEDEC Std. tAVAV tWC Write Cycle Time (Note 1) Min 70 90 120 ns tAVWL tAS Address Setup Time Min 0 ns tASO Address Setup Time to OE# low during toggle bit polling Min 15 ns tWLAX tAH Address Hold Time Min 45 45 50 ns tAHT Address Hold Time From CE# or OE# high during toggle bit polling Min 0 ns tDVWH tDS Data Setup Time Min 35 45 50 ns tWHDX tDH Data Hold Time Min 0 ns tOEPH Output Enable High during toggle bit polling Min 20 ns tGHWL tGHWL Read Recovery Time Before Write (OE# High to WE# Low) Min 0 ns tELWL tCS CE# Setup Time Min 0 ns tWHEH tCH CE# Hold Time Min 0 ns tWLWH tWP Write Pulse Width Min 35 35 50 ns tWHDL tWPH Write Pulse Width High Min 30 ns tSR/W Latency Between Read and Write Operations Min 0 ns tWHWH1 tWHWH1 Programming Operation (Note 2) Byte Typ 6 us Word Typ 8 tWHWH2 tWHWH2 Sector Erase Operation (Note 2) Typ 0.7 sec tVCS Vcc Setup Time (Note 1) Min 50 us tRB Write Recovery Time from RY/BY# Min 0 ns tBUSY Program/Erase Valid to RY/BY# Delay Max 90 ns Notes: 1. Not 100% tested. 2. See the “Erase And Programming Performance” section for more information. |
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