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MC74LVX257 Datasheet(PDF) 2 Page - ON Semiconductor |
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MC74LVX257 Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 8 page ![]() MC74LVX257 http://onsemi.com 2 FUNCTION TABLE OE S Y0 − Y3 A0 − A3, B0 − B3 = the levels of the respective Data−Word Inputs. H L L X L H Z A0 − A3 B0 − B3 Inputs Outputs 3 OE S A0 B0 A1 B1 A2 B2 2 5 6 11 10 14 13 12 9 7 4 Y0 MUX Y1 Y2 Y3 EN 1 15 A3 B3 G1 1 1 Figure 1. Pin Assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 S Y0 B0 A0 Y1 B1 A1 GND Y3 B3 A3 OE VCC B2 A2 Y2 Figure 2. Expanded Logic Diagram Figure 3. IEC Logic Symbol Za I0a 4 2 S I1a 3 1 Zb I0b 7 5 I1b 6 Zc I0c 12 14 I1c 13 Zd I0d 9 11 I1d 10 OE 15 ORDERING INFORMATION Device Package Shipping† MC74LVX257D SOIC−16 48 Units / Rail MC74LVX257DG SOIC−16 (Pb−Free) 48 Units / Rail MC74LVX257DR2 SOIC−16 2500 Tape & Reel MC74LVX257DR2G SOIC−16 (Pb−Free) 2500 Tape & Reel MC74LVX257DT TSSOP−16* 96 Units / Rail MC74LVX257DTR2 TSSOP−16* 2500 Tape & Reel MC74LVX257M SOEIAJ−16 50 Units / Rail MC74LVX257MEL SOEIAJ−16 2000 Tape & Reel MC74LVX257MELG SOEIAJ−16 (Pb−Free) 2000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. |